DISPLAY PANEL AND DISPLAY APPARATUS
    3.
    发明公开

    公开(公告)号:EP4383243A1

    公开(公告)日:2024-06-12

    申请号:EP23212832.2

    申请日:2023-11-28

    IPC分类号: G09G3/3233

    摘要: Disclosed is a display panel comprising a display area including a first area in which first subpixels are disposed and a second area in which second subpixels are disposed, wherein each of the first and second subpixels includes a first light emitting element driven through a first light emitting control transistor, a second light emitting element driven through a second light emitting control transistor, a first lens region disposed on the first light emitting element, and a second lens region disposed on the second light emitting element, wherein the first lens region and the second lens region differently control a viewing angle in a first direction, the first light emitting control transistor of the first subpixel is controlled by a first light emitting control signal, the second light emitting control transistor of the first subpixel is controlled by a second light emitting control signal, the first light emitting control transistor of the second subpixel is controlled by a third light emitting control signal, and the second light emitting control transistor of the second subpixel is controlled by a fourth light emitting control signal.

    DISPLAY PANEL AND DISPLAY APPARATUS
    5.
    发明公开

    公开(公告)号:EP4411713A1

    公开(公告)日:2024-08-07

    申请号:EP24152654.0

    申请日:2024-01-18

    IPC分类号: G09G3/3233

    摘要: A display panel (100) may adjust a ratio of a plurality of regions enabling a viewing angle to be independently controlled. The display panel (100) may include a plurality of pixel blocks (B1, ..., Bk) each including a plurality of unit pixels (PX1, PX2, PX3) disposed in a display area (DA), a bezel area (BZ1, ..., BZ4) disposed outside the display area (DA), and a plurality of mode control line sets respectively connected with the plurality of pixel blocks (B1, ..., Bk). Each of the plurality of mode control line sets may include a first mode control line (42) transferring a first mode control signal (SH) and a second mode control line (44) transferring a second mode control signal (PR). Each of the plurality of unit pixels (PX1, PX2, PX3) includes a plurality of subpixels (SP). Each of the plurality of subpixels (SP) may include a first light emitting device (EL1) connected with a driving transistor (DT) through a first mode control transistor (T8) controlled by the first mode control signal (SH), a first lens region (BWE, RWE, GWE) disposed on the first light emitting device (EL1), a second light emitting device (EL2) connected with the driving transistor (DT) through a second mode control transistor (T6) controlled by the second mode control signal (PR), and a second lens region (BNE, RNE, GNE) disposed on the second light emitting device (EL2), and one of the first mode control line (42), the second mode control line (44), and a second power line (34) is disposed in parallel with a first power line (32), between the unit pixels (PX1, PX2, PX3).