GRAPHICS CONTEXT SCHEDULING BASED ON FLIP QUEUE MANAGEMENT

    公开(公告)号:EP3391364A1

    公开(公告)日:2018-10-24

    申请号:EP16874186.6

    申请日:2016-09-22

    IPC分类号: G09G5/39

    摘要: A processor includes a scheduler that governs which of a plurality of pending graphics contexts is selected for execution at a graphics pipeline of the processor. The processor also includes a plurality of flip queues storing data ready to be rendered at a display device. The executing graphics context can issue a flip request to change data at stored at one of the flip queues. In response to determining that the flip request targets a flip queue that is being used for rendering at the display device, the scheduler executes a context switch to schedule a different graphics context for execution at the graphics pipeline.

    MEMORY POWER SAVINGS IN IDLE DISPLAY CASE
    3.
    发明公开
    MEMORY POWER SAVINGS IN IDLE DISPLAY CASE 审中-公开
    内存省电在IDLE显示案例

    公开(公告)号:EP3309674A1

    公开(公告)日:2018-04-18

    申请号:EP17205934.7

    申请日:2014-04-03

    申请人: Apple Inc.

    摘要: In an embodiment, a system includes a memory controller that includes a memory cache and a display controller configured to control a display. The system may be configured to detect that the images being displayed are essentially static, and may be configured to cause the display controller to request allocation in the memory cache for source frame buffer data. In some embodiments, the system may also alter power management configuration in the memory cache to prevent the memory cache from shutting down or reducing its effective size during the idle screen case, so that the frame buffer data may remain cached. During times that the display is dynamically changing, the frame buffer data may not be cached in the memory cache and the power management configuration may permit the shutting down/size reduction in the memory cache.

    摘要翻译: 在一个实施例中,一种系统包括:存储器控制器,其包括存储器高速缓存和被配置为控制显示器的显示器控制器。 系统可以被配置为检测正被显示的图像基本上是静态的,并且可以被配置为使得显示控制器向存储器高速缓存中请求分配源帧缓冲器数据。 在一些实施例中,系统还可以改变存储器高速缓存中的功率管理配置,以防止存储器高速缓存在空闲屏幕情况期间关闭或减小其有效大小,使得帧缓冲器数据可以保持高速缓存。 在显示器动态改变的时候,帧缓冲器数据可能不会被缓存在存储器缓存中,并且电源管理配置可以允许关闭/减小存储器缓存中的尺寸。

    Image-displaying device and display timing control circuit
    4.
    发明授权
    Image-displaying device and display timing control circuit 有权
    图像显示装置和显示时序控制电路

    公开(公告)号:EP2388772B1

    公开(公告)日:2018-04-18

    申请号:EP11166422.3

    申请日:2011-05-17

    IPC分类号: G09G5/00 G09G5/393 G09G5/395

    摘要: An image-displaying device includes a first storage means, an image data generation means, a timing information acquisition means and a display control means. The image data generation means is configured to output the image data to the first storage means with the image data being composed of a plurality of predetermined data units. The timing information acquisition means is configured to acquire timing information indicative of a timing related to generation and output of the image data to the first storage means with respect to each of the predetermined data units. The display control means is configured to control a display means to read and display an N th one of the predetermined data units after output of an (N+i) th one of the predetermined data units to the first storage means is completed according to the timing information, where N is a natural number and i is a nonnegative integer.

    TILED VIEWPORT COMPOSITION
    6.
    发明授权
    TILED VIEWPORT COMPOSITION 有权
    倾斜的视角组合

    公开(公告)号:EP3098807B1

    公开(公告)日:2018-01-17

    申请号:EP16179806.1

    申请日:2012-06-08

    发明人: BELANGER, Etienne

    IPC分类号: G09G5/393 G09G5/395 G09G5/399

    CPC分类号: G09G5/393 G09G5/395 G09G5/399

    摘要: A system that buffers an application image reduces bandwidth requirements for accessing memory. The application image is logically separated into tiles. A viewport identifies a visible portion of the application image, where the visible portion is smaller than the application image. The tiles overlapped by the viewport are buffered in a front buffer and a back buffer. The tiles not overlapped by the viewport are buffered in the back buffer but not in the front buffer. A composition manager, with knowledge of the viewport and at least two noncontiguous tile buffers in the front buffer, extracts the visible portion of the application image directly from the noncontiguous tile buffers.

    LOW LATENCY INK RENDERING PIPELINE
    9.
    发明公开
    LOW LATENCY INK RENDERING PIPELINE 审中-公开
    低延时油墨渲染管道

    公开(公告)号:EP3201750A1

    公开(公告)日:2017-08-09

    申请号:EP15778520.5

    申请日:2015-09-29

    摘要: Systems and methods are provided for improving the latency for display of ink during user creation of ink content with a stylus, mouse, finger (or other touch input), or other drawing device for tracing a desired location for ink content in a display area. In order to reduce or minimize the time for display of ink content created by a user using a stylus/mouse/touch input/other device, a separate ink rendering process thread can be used that operates within the operating system and in parallel to other application threads. When it is desired to create ink content within an application, user interactions corresponding to creation of ink content can be handled by the separate ink rendering process thread. This can avoid potential delays in displaying ink content due to an application handling other events in a process flow.

    摘要翻译: 提供了系统和方法,用于在用户利用触笔,鼠标,手指(或其他触摸输入)或用于在显示区域中追踪墨水内容的期望位置的其他绘图设备创建墨水内容期间改进用于显示墨水的等待时间。 为了减少或最小化用户使用触控笔/鼠标/触摸输入/其他设备创建的墨水内容的显示时间,可以使用单独的墨水渲染处理线程,其在操作系统内操作并且与其他应用并行 线程。 当需要在应用程序内创建墨水内容时,可以通过单独的墨水渲染处理线程来处理与创建墨水内容相对应的用户交互。 这可以避免由于应用程序在处理流程中处理其他事件而导致显示墨水内容的潜在延迟。