摘要:
The present invention provides systems, apparatus, and methods for forming three dimensional memory arrays using a multi-depth imprint lithography mask and a damascene process An imprint lithography mask for manufacturing a memory layer in a three dimensional memory is described. The mask includes a translucent material formed with features for making an imprint in a transfer material to be used in a damascene process, the mask having a plurality of imprint depths. At least one imprint depth corresponds to trenches for forming memory lines and at least one depth corresponds to holes for forming vias. Numerous other aspects are disclosed.
摘要:
Described is a method for forming a multilevel structure on a surface. The method comprises: depositing a curable liquid layer (200) on the surface; pressing a stamp (120) having a multilevel pattern therein into the liquid layer to produce in the liquid layer a multilevel structure defined by the pattern; and, curing the liquid layer to produce a solid layer having the multilevel structure therein. Mechanical alignment may be employed to enhance optical alignment of the stamp relative to the substrate via a plurality of spaced protrusions on the substrate on which the structure is to be formed and complementary recesses in the patterning of the stamp.
摘要:
Described is a method for forming a multilevel structure on a surface. The method comprises: depositing a curable liquid layer (200) on the surface; pressing a stamp (120) having a multilevel pattern therein into the liquid layer to produce in the liquid layer a multilevel structure defined by the pattern; and, curing the liquid layer to produce a solid layer having the multilevel structure therein. Mechanical alignment may be employed to enhance optical alignment of the stamp relative to the substrate via a plurality of spaced protrusions on the substrate on which the structure is to be formed and complementary recesses in the patterning of the stamp.
摘要:
A process for the manufacture of silicon integrated circuits uses a dual damascene metallization process with an organic intermetal dielectric (14). A pattern to be etched is first etched in a hard mask (16) without exposing the underlying intermetal dielectric (14) and then transferred into the intermetal dielectric (14) on an enlarged scale.