公开(公告)号：EP2120339A3

公开(公告)日：2010-12-08

申请号：EP09159153.7

申请日：2009-04-30

申请人： Thomson Licensing

发明人： Liao, Zhi Jun ,  Schmidt, Robert Warren ,  Sun, Ai Hua

IPC分类号： H03K5/00

CPC分类号： H03K5/1254 ,  H03K17/22

摘要： A key press detecting circuit for detecting the status of the key (K1) is provided. The key press detecting circuit comprises a discharging circuit (1) which discharges when the key (K1) is pressed; and a voltage detecting circuit (2), which comprises a combination of a PNP transistor (T2) and a NPN transistor (T3), wherein when the discharging circuit (1) discharges for a predefined period, the PNP transistor (T2) will be turn on, which causes the NPN transistor (T3) to be turned on and to output a second signal (RESET) for a second function.

公开(公告)号：EP0505189B1

公开(公告)日：1998-05-06

申请号：EP92302388.1

申请日：1992-03-19

申请人： HITACHI, LTD.

发明人： Kobayashi, Ryoichi ,  Sugiura, Noboru

IPC分类号： H03K5/01

CPC分类号： H03K5/1254

公开(公告)号：EP2151053B1

公开(公告)日：2012-03-14

申请号：EP08769830.4

申请日：2008-05-29

申请人： Kyocera Corporation

发明人： TAYLOR, John, Philip

IPC分类号： G11C27/02 ,  H03K5/1254

CPC分类号： G11C27/02 ,  H03K5/1254

摘要： A switch de-bouncing device includes a majority counter that counts samples generated by a sampler sampling a switch output where a counter value is incremented for each sample indicating a first switch state and decremented for each sample indicating a second switch state of the switch. A controller determines that the switch is in the first switch state when the counter value is above a first state threshold and is in the second switch state when the counter value is below a second state threshold.

公开(公告)号：EP2308148A2

公开(公告)日：2011-04-13

申请号：EP09769644.7

申请日：2009-06-24

申请人： Indesit Company, S.p.A.

发明人： TORDONI, Simone ,  POSSANZA, Mauro ,  CORSI, Fabrizio ,  CESARONI, Andrea

IPC分类号： H02J9/00

CPC分类号： H02J9/005 ,  H03K3/2865 ,  H03K5/1254 ,  H03K17/6877

摘要： The present invention relates to an electric standby circuit (4) for an electric appliance. The circuit comprises a switch (41) adapted to open and close an electric connection between a first input (IN1) and an output (OUT) of the circuit (4), and a bistable circuit electrically connected to the switch in order to control the opening and closing thereof. The bistable circuit comprises a first BJT transistor (Q19) of the pnp type and a second BJT transistor (Q12) of the npn type. The first transistor (Q19) is connected to the first input (IN1) through the emitter, and the collector of the first transistor (Q19) is connected to the base of the second transistor (Q12) through a first resistor (R39). The collector of the second transistor (Q12) is connected to the switch (41) and to a second input (IN3) through a second resistor (R40). The base of the first transistor (Q19) is connected to the second input (IN3) through a third resistor (R38).

公开(公告)号：EP2006832A3

公开(公告)日：2010-01-13

申请号：EP08005719.3

申请日：2008-03-27

申请人： Samsung Electronics Co., Ltd.

发明人： Bae, Sang-don ,  Park, Jin-kyu

IPC分类号： G09G3/36 ,  G09G5/00

CPC分类号： G09G5/003 ,  G09G3/3406 ,  G09G3/3611 ,  G09G2320/0606 ,  G09G2320/0626 ,  G09G2320/08 ,  H03K5/1254 ,  H03K2005/00247

摘要： A timing controller (600) that can reduce malfunctions, a liquid crystal display (LCD) (10) including the timing controller (600), and a method of operating the LCD (10), in which the timing controller (600) includes a counter providing a converting enable signal; an analog-to-digital (A/D) converter converting a user command signal into a digital user command signal in response to the converting enable signal; and a control signal generator generating a module control signal that corresponds to the digital user command signal.

公开(公告)号：EP1935095B1

公开(公告)日：2009-11-04

申请号：EP07766264.1

申请日：2007-07-17

申请人： GS IP Limited Liability Company

发明人： MACAULAY, Rob

IPC分类号： H03K5/1254

CPC分类号： H03K5/1254

摘要： A switch circuit comprising a mechanical switch having two contact elements, the switch being operable to bring the two contact elements into physical contact and thereby output an analogue switch signal representative of operation of the switch and a sigma-delta modulator arranged to receive the analogue switch signal and to output a digital switch signal in dependence thereon, the sigma-delta modulator having a frequency response such that it can suppress a relatively high frequency component of the analogue input signal and thereby effectively debounce the output of the switch.

公开(公告)号：EP2151053A2

公开(公告)日：2010-02-10

申请号：EP08769830.4

申请日：2008-05-29

申请人： Kyocera Wireless Corp.

发明人： TAYLOR, John, Philip

IPC分类号： H03K5/1254

CPC分类号： G11C27/02 ,  H03K5/1254

摘要： A switch de-bouncing device includes a majority counter that counts samples generated by a sampler sampling a switch output where a counter value is incremented for each sample indicating a first switch state and decremented for each sample indicating a second switch state of the switch. A controller determines that the switch is in the first switch state when the counter value is above a first state threshold and is in the second switch state when the counter value is below a second state threshold.

公开(公告)号：EP1335491B1

公开(公告)日：2009-10-28

申请号：EP03001053.2

申请日：2003-01-17

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Reichmann, Eckehard

IPC分类号： H03K5/1254

CPC分类号： H03K5/1254

公开(公告)号：EP1935095A1

公开(公告)日：2008-06-25

申请号：EP07766264.1

申请日：2007-07-17

申请人： GS IP Limited Liability Company

发明人： MACAULAY, Rob

IPC分类号： H03K5/1254

CPC分类号： H03K5/1254

摘要： A switch circuit comprising a mechanical switch having two contact elements, the switch being operable to bring the two contact elements into physical contact and thereby output an analogue switch signal representative of operation of the switch and a sigma-delta modulator arranged to receive the analogue switch signal and to output a digital switch signal in dependence thereon, the sigma-delta modulator having a frequency response such that it can suppress a relatively high frequency component of the analogue input signal and thereby effectively debounce the output of the switch.

公开(公告)号：EP1335491A2

公开(公告)日：2003-08-13

申请号：EP03001053.2

申请日：2003-01-17

申请人： SIEMENS AKTIENGESELLSCHAFT

发明人： Reichmann, Eckehard

IPC分类号： H03K5/1254

CPC分类号： H03K5/1254

摘要： Die Erfindung betrifft eine Schaltungsanordnung zur Entprellung von Eingangssignalen mit einer Speicheranordnung, die als Matrix mit wenigstens M Spalten und N Zeilen, mit M, N ≥ 1 organisiert ist und bei der vorgesehen ist, Signalzustände eines Eingangssignals jeweils einer Spalte M zuzuführen und als Eintrag zu speichern, und bei der in Abhängigkeit wenigstens einer logischen Verknüpfung von wenigstens zwei Einträgen einer Spalte die Stabilität des Eingangssignals ableitbar ist. Weiter betrifft die Erfindung ein Verfahren zur Entprellung von Eingangssignalen und eine Automatisierungsanlage. Um viele Signalzustände einer derartigen Schaltungsanordnung gleichzeitig mit geringem Aufwand auf ihre Stabilität zu untersuchen, wird vorgeschlagen, in einer Speicheranordnung jeweils die zeitlich älteste Zeile mit Einträgen zu überschreiben und jeweils alle Einträge einer Spalte logisch miteinander zu verknüpfen, wobei vorzugsweise alle Einträge einer Zeile zeitgleich mit den Einträgen einer anderen Zeile verknüpft werden. Durch die statische Struktur der Speicheranordnung müssen die Einträge zur Verknüpfung nicht verschoben oder ausgetauscht werden, so dass für viele Eingangssignale eine einfache Auswertung in Bezug auf die Stabilität erfolgen kann.

摘要翻译： 电路装置具有被组织为具有输入信号（AZ）的信号状态的矩阵的存储装置（10），并将其存储为条目，并且从至少两个条目的至少一个逻辑组合导出信号的稳定性 的列。 要读取的当前信号状态与最旧的条目一起存储在行中。 还包括以下独立权利要求：一种消除输入信号和自动化系统的方法。