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11 条记录 (耗时 0.009 秒)

    DELAY RESILIENT DECISION FEEDBACK EQUALIZER
    1.
    发明公开
    DELAY RESILIENT DECISION FEEDBACK EQUALIZER 审中-公开
    延迟韧性决策反馈均衡器

    公开(公告)号：EP3235203A1

    公开(公告)日：2017-10-25

    申请号：EP15870558.2

    申请日：2015-11-12

    申请人： Intel Corporation

    发明人： LAUFER, Amir ,  LEVIN, Itamar

    IPC分类号： H04L25/03 ,  H04L25/08

    CPC分类号： H04L25/03057 ,  H04L25/03885 ,  H04L2025/03579

    摘要： Described is an apparatus which comprises a decision feedback equalizer (DFE) having a first DFE tap path and non-first DFE tap paths, wherein the DFE includes a variable delay circuit in a signal path of the non-first DFE tap paths. In some embodiment, an apparatus is provided which comprises: a summer; a slicer to receive input from the summer; a first feedback loop to cancel a first post-cursor, the first feedback loop forming a loop by coupling the slicer to the summer; and a second feedback loop to cancel a second post-cursor, the second feedback loop forming a loop by coupling an input of the first feedback loop to the summer, wherein the second feedback loop having a programmable delay at its input.

    摘要翻译： 描述了包括具有第一DFE抽头路径和非第一DFE抽头路径的判定反馈均衡器（DFE）的设备，其中DFE在非第一DFE抽头路径的信号路径中包括可变延迟电路。 在一些实施例中，提供了一种装置，其包括：夏天; 一台切片机接受来自夏季的输入; 用于取消第一后标志的第一反馈回路，所述第一反馈回路通过将所述限幅器耦合到所述夏季而形成回路; 以及用于取消第二后标的第二反馈回路，所述第二反馈回路通过将所述第一反馈回路的输入耦合到所述加法器而形成回路，其中所述第二反馈回路在其输入处具有可编程延迟。

    Variable inter symbol interference generator
    2.
    发明公开
    Variable inter symbol interference generator 审中-公开
    Verstellbarer Zwischensymbol-Interferenzgenerator

    公开(公告)号：EP2485427A2

    公开(公告)日：2012-08-08

    申请号：EP12154072.8

    申请日：2012-02-06

    申请人： Tektronix, Inc.

    发明人： Washura, Thomas E. ,  Reinhold, Stephen N.

    IPC分类号： H04L1/24

    CPC分类号： H04L1/24 ,  G01R31/31709 ,  H04L25/03885 ,  H04L2025/03471 ,  H04L2025/03579

    摘要： Embodiments of the present invention provide a variable inter symbol interference generator that generates a data signal having a variable amount of inter symbol interference by passing a data signal through (1) a programmable filter having an adjustable frequency response, and through (2) a fixed filter having a fixed frequency response such as a PCB trace, a length of cable, a discrete filter, or the like. By adjusting the parameters and therefore the insertion gain or loss of the programmable filter, a large range of continuously variable and finely-tunable inter symbol interference amounts can be easily generated.

    摘要翻译： 本发明的实施例提供了一种可变的符号间干扰发生器，通过（1）具有可调节的频率响应的可编程滤波器，并通过（2）固定的（2）固定的频率响应来产生具有可变量的符号间干扰的数据信号 具有固定频率响应的滤波器，例如PCB走线，电缆长度，离散滤波器等。 通过调整参数，因此调节可编程滤波器的插入增益或损耗，可以容易地产生大范围的连续可变和微调谐的符号间干扰量。

    Variable inter symbol interference generator
    5.
    发明公开
    Variable inter symbol interference generator 审中-公开
    可调码间干扰发生器

    公开(公告)号：EP2485427A3

    公开(公告)日：2014-12-03

    申请号：EP12154072.8

    申请日：2012-02-06

    申请人： Tektronix, Inc.

    发明人： Washura, Thomas E. ,  Reinhold, Stephen N.

    IPC分类号： H04L1/24 ,  H04L25/03 ,  G01R31/317

    CPC分类号： H04L1/24 ,  G01R31/31709 ,  H04L25/03885 ,  H04L2025/03471 ,  H04L2025/03579

    摘要： Embodiments of the present invention provide a variable inter symbol interference generator that generates a data signal having a variable amount of inter symbol interference by passing a data signal through (1) a programmable filter having an adjustable frequency response, and through (2) a fixed filter having a fixed frequency response such as a PCB trace, a length of cable, a discrete filter, or the like. By adjusting the parameters and therefore the insertion gain or loss of the programmable filter, a large range of continuously variable and finely-tunable inter symbol interference amounts can be easily generated.

    WAVEFORM EQUALIZER, ITS CONTROL METHOD, RECEPTION DEVICE, AND ITS CONTROL METHOD
    6.
    发明公开
    WAVEFORM EQUALIZER, ITS CONTROL METHOD, RECEPTION DEVICE, AND ITS CONTROL METHOD 审中-公开
    KURVENENTZERRER，STEUERUNGSVERFAHRENDAFÜRSOWIE EMPFANGSVORRICHTUNG UND STEUERUNGSVERFAHRENDAFÜR

    公开(公告)号：EP2178221A1

    公开(公告)日：2010-04-21

    申请号：EP08827164.8

    申请日：2008-08-06

    申请人： Sony Corporation

    发明人： FUNAMOTO, Kazuhisa ,  NANIWADA, Koji ,  DOAN, Dzung Tien

    IPC分类号： H04B7/005 ,  H04B3/06

    CPC分类号： H04B3/142 ,  H04L25/03038 ,  H04L25/0305 ,  H04L2025/03509 ,  H04L2025/03579

    摘要： The present invention relates to a waveform equalizer and a method for controlling the same, as well as a receiving apparatus and a method for controlling the same whereby better receiving characteristics are provided than before.
    In a filter 28, registers 91 1 through 91 5 delay an input DT1; multipliers 92 0 through 92 5 multiply outputs from the registers by filter coefficients C 20 through C 25 respectively; and adders 93 1 through 93 5 add up outputs from the multipliers to acquire DT2. A selector 81 either outputs a timing signal at intervals of a symbol period of DT1 to drive the filter 82 as a symbol rate equalizer, or outputs the timing signal at intervals of half the symbol period to operate the filter 82 as a fractionally spaced equalizer. The present invention may be applied to waveform equalizers performing waveform equalization of the input signal.

    摘要翻译： 波形均衡器及其控制方法技术领域本发明涉及一种波形均衡器及其控制方法，以及一种接收装置及其控制方法，从而提供比以前更好的接收特性。 在滤波器28中，寄存器91 1至91 5延迟输入DT1; 乘法器92 0至92 5分别通过滤波器系数C 20至C 25对寄存器的输出进行乘法运算; 并且加法器93 1至93 5将来自乘法器的输出相加以获取DT2。 选择器81以DT1的符号周期的间隔输出定时信号，以驱动滤波器82作为符号速率均衡器，或以符号周期的一半的间隔输出定时信号，以将滤波器82作为分数间隔的均衡器进行操作。 本发明可以应用于执行输入信号的波形均衡的波形均衡器。

    Equaliser, operable in decision-feedback or fractional modes
    7.
    发明公开
    Equaliser, operable in decision-feedback or fractional modes 失效
    Entzerrer，der inentscheidungsrückgekoppelter表格oder fraktionierter Form arbeiten kann。

    公开(公告)号：EP0512712A2

    公开(公告)日：1992-11-11

    申请号：EP92303580.2

    申请日：1992-04-22

    申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.

    发明人： Tsubaki, Kazuhisa ,  Uesugi, Mitsuru ,  Honma, Kouichi

    IPC分类号： H04L25/03 ,  H03H17/06

    CPC分类号： H04L25/03044 ,  H03H17/06 ,  H04L25/03057 ,  H04L2025/03573 ,  H04L2025/03579

    摘要： According to the present invention, a large compensation effect can be obtained in a small operation volume regardless of which one of a distortion due to a frequency selective fading and a distortion due to an interference of adjacent waves is ruling. In the present invention, a principal wave signal and signals of channels adjacent to both sides of said principal wave are taken out, and power of these signals is compared to select either one of the fractional interval equalizer (16) and the linear decision feedback equalizer (17).

    摘要翻译： 根据本发明，可以在小的操作体积中获得大的补偿效果，而不管由于频率选择性衰落引起的失真和由于相邻波浪的干扰引起的失真。 在本发明中，取出主波信号和与所述主波两侧相邻的信道的信号，并比较这些信号的功率以选择分数间隔均衡器（16）和线性判决反馈均衡器 （17）。

    Variable inter symbol interference generator
    8.
    发明授权
    Variable inter symbol interference generator 有权

    公开(公告)号：EP2485427B1

    公开(公告)日：2018-10-03

    申请号：EP12154072.8

    申请日：2012-02-06

    申请人： Tektronix, Inc.

    发明人： Waschura, Thomas E. ,  Reinhold, Stephen N.

    IPC分类号： H04L1/24 ,  H04L25/03 ,  G01R31/317

    CPC分类号： H04L1/24 ,  G01R31/31709 ,  H04L25/03885 ,  H04L2025/03471 ,  H04L2025/03579

    摘要： Embodiments of the present invention provide a variable inter symbol interference generator that generates a data signal having a variable amount of inter symbol interference by passing a data signal through (1) a programmable filter having an adjustable frequency response, and through (2) a fixed filter having a fixed frequency response such as a PCB trace, a length of cable, a discrete filter, or the like. By adjusting the parameters and therefore the insertion gain or loss of the programmable filter, a large range of continuously variable and finely-tunable inter symbol interference amounts can be easily generated.