摘要:
The invention provides a diode modulator circuit which is adapted to supply an acceptable S-correction of the S-linearity error of the line scanning of a picture tube (CRT) at substantially different line scan widths. A known diode modulator comprises two loops. The first loop comprises a series arrangement of a line deflection coil (LD) and an S-capacitor (CS), which series arrangement is arranged in parallel with a first flyback capacitor (CF1) and a first diode (D1). The second loop comprises a modulator coil (LB) arranged in parallel with a second flyback capacitor (CF2) and a second diode (D2). The two loops are arranged in series. An inner-pincushion capacitor (CSM) is arranged in a common path in which the line deflection current (Id) and a modulator current (Ib) flowing through the modulator coil (LB) flow in opposite directions. The amount of S-correction depends on the values of the S-correction capacitor (SC) and the inner-pincushion capacitor (CSM). The S-capacitor (CS) has been omitted in the diode modulator according to the invention. In this way, the amount of S-correction at minimal scan width will be zero because the common current (Im) flowing in the common path is zero if the diode modulator is in equilibrium. The diode modulator according to the invention can thus cope with picture tubes (CRT) which require a very low amount of S-correction at a small scan width without the need for an additional capacitor (CS2) and a thyristor switching circuit (T) to activate the additional capacitor (CS2) to lower the amount of S-correction at the small scan width. The invention is particularly useful if a continuous zoom between a 16/9 and a 4/3 scan width on a display tube with a 16/9 aspect ratio has to be performed in a simple way.
摘要:
The invention relates to a circuit arrangement for controlling the supply voltage (Ubvar) of a video signal deflection unit, especially a horizontal deflection unit (1) pertaining to a television apparatus or a monitor. The inventive arrangement comprises a control device (7) that receives a measured frequency signal (A) corresponding to the current frequency value of an input frequency (HSYNC) and a measured voltage signal (B) corresponding to the current voltage value of the supply voltage (Ubvar). The control device can adjust the operating frequency (D) of the video signal deflection unit (1) and the supply voltage (Ubvar) in an interdependent manner, according to said two measured signals (A, B) and in such a way that malfunctioning of the video signal deflection unit (1) is reliably prevented, whereby said operating frequency depends on the input frequency (HSYNC).
摘要:
First and second field type detectors for first and second video signals have outputs indicating whether the video signals have first or second field types. The first video signal is synchronized with the second video signal for a combined display by a synchronous field memory and an asynchronous multiple line memory. The field type of the second video signal is changed when necessary to match the field type of the first video signal to maintain interlace integrity in the combined display. A field type changing circuit, which controls the synchronizing, has a first mode of operation which delays writing a current field of the first field type by one horizontal line period, a second mode of operation which advances writing a current field of the second field type by one horizontal line period and a third mode of operation which maintains a current field type. A comparison of the field type of the second signal to the field type of the first signal results in an output signal indicating one of a plurality of comparison outcomes, wherein the first and second video signals have the same field type, wherein the first video signal has the first field type and the second video signal has the second field type and wherein the first video signal has the second field type and the second video signal ha the first field type. A plurality of selectable interlace correction signals are generated, each being appropriate for one of the plurality of comparison outcomes.
摘要:
A method for generating display correction waveforms for a CRT display comprises the steps of selecting one of a plurality of trace portions for forming part of a correction waveform, the trace portions having different average values. Completing each of the correction waveform by combining each selected trace portion with a respective retrace portion such that all completed correction waveforms have a predetermined average value. The correction waveforms may have vertical and/or horizontal rates.
摘要:
A method for generating display correction waveforms for a CRT display comprises the steps of selecting one of a plurality of trace portions for forming part of a correction waveform, the trace portions having different average values. Completing each of the correction waveform by combining each selected trace portion with a respective retrace portion such that all completed correction waveforms have a predetermined average value. The correction waveforms may have vertical and/or horizontal rates.
摘要:
An inventive method for adapting a display frame rate in a receiver to a picture frame rate of a received signal includes the steps of comparing a picture frame rate of a received signal with a display frame of a receiver, adjusting lines per field or lines per frame displayed in response to the comparing step, and generating a display frame rate control signal for the receiver in response to the adjusting step.