摘要:
A method of controlling gate oxide thickness in the fabrication of semiconductor devices wherein a sacrificial gate oxide layer is formed on a semiconductor substrate surface. Nitrogens ions are implanted into select locations of the substrate through the sacrificial gate oxide layer, and the substrate and the gate oxide layer are then thermally annealed. The sacrificial gate oxide layer is then removed and a gate oxide layer is then formed on the substrate layer wherein the portion of the gate oxide layer formed on the nitrogen ion implanted portion of the substrate is thinner than the portion of the gate oxide layer formed on the non-nitrogen ion implanted portion.
摘要:
An AlGaAs chip 10 which has an n-type layer 11 and a p-type layer 12 is immersed in an aqueous solution containing 0.2-0.6 wt% of ammonia and 25-35 wt% of hydrogen peroxide to form a primary protective layer 20, and after drying the AlGaAs chip 10, the AlGaAs chip 10 is for a second time immersed in an aqueous solution containing 0.2-0.6 wt% of ammonia and 25-35 wt% of hydrogen peroxide to form a secondary protective layer 21.
摘要:
A method of manufacturing a semiconductor device in which a lateral insulated gate field effect transistor (IGFET) (1) is provided by defining an insulated gate structure (12) on a given surface (3a) of a semiconductor body (3) by providing an insulating layer on the given surface (3a) having a relatively thin region on a first area of the given surface adjoining a relatively thick region (14a) on a second area (31b) of the given surface and providing a conductive layer (15,16) on the insulating layer to define an insulated gate over the first area of the given surface with the conductive layer extending up onto the relatively thick region of the insulating layer. A window (26) is opened in the conductive layer on the relatively thick region of the insulating layer and the insulating layer is then etched isotropically through the window in the conductive layer to form a window (25) in the relatively thick region of the insulating layer thereby leaving part (29) of the conductive layer overhanging the edge of the window in the insulating layer. The conductive layer is then selectively etched with at least the area of conductive layer spaced from the window masked so as to remove the part (29) overhanging the edge of the window (25) in the insulating layer. Impurities are then introduced using the insulated gate structure (12) as a mask to form a source region (9) aligned with the insulated gate and a drain region (10) aligned with the window in the conductive layer (15, 16).
摘要:
A method of controlling gate oxide thickness in the fabrication of semiconductor devices wherein a sacrificial gate oxide layer is formed on a semiconductor substrate surface. Nitrogens ions are implanted into select locations of the substrate through the sacrificial gate oxide layer, and the substrate and the gate oxide layer are then thermally annealed. The sacrificial gate oxide layer is then removed and a gate oxide layer is then formed on the substrate layer wherein the portion of the gate oxide layer formed on the nitrogen ion implanted portion of the substrate is thinner than the portion of the gate oxide layer formed on the non-nitrogen ion implanted portion.
摘要:
A semiconductor device fabrication process in which the features of a composite mask are transferred to a first covering on a surface of a semiconductor bulk, the first covering is etched to provide windows for the introduction of impurities into the semiconductor bulk, and selected windows in the first covering are masked by a second covering differing in composition from the first covering, to facilitate the introduction of impurities through open windows in the first covering into the semiconductor bulk.
摘要:
A method for making submicron dielectric windows (65) for electron tunneling between a floating gate (70) and substrate (15) in a semiconductor EEPROM device. A mask edge (35) overlying an oxide layer (25) on a substrate (15) is undercut a small distance (40), the area surrounding that small distance is built up with oxide (50), then a thin layer of oxide is formed in the undercut distance to serve as a tunneling window (65).
摘要:
A method of manufacturing a semiconductor device in which a lateral insulated gate field effect transistor (IGFET) (1) is provided by defining an insulated gate structure (12) on a given surface (3a) of a semiconductor body (3) by providing an insulating layer on the given surface (3a) having a relatively thin region on a first area of the given surface adjoining a relatively thick region (14a) on a second area (31b) of the given surface and providing a conductive layer (15,16) on the insulating layer to define an insulated gate over the first area of the given surface with the conductive layer extending up onto the relatively thick region of the insulating layer. A window (26) is opened in the conductive layer on the relatively thick region of the insulating layer and the insulating layer is then etched isotropically through the window in the conductive layer to form a window (25) in the relatively thick region of the insulating layer thereby leaving part (29) of the conductive layer overhanging the edge of the window in the insulating layer. The conductive layer is then selectively etched with at least the area of conductive layer spaced from the window masked so as to remove the part (29) overhanging the edge of the window (25) in the insulating layer. Impurities are then introduced using the insulated gate structure (12) as a mask to form a source region (9) aligned with the insulated gate and a drain region (10) aligned with the window in the conductive layer (15, 16).
摘要:
A method for making submicron dielectric windows (65) for electron tunneling between a floating gate (70) and substrate (15) in a semiconductor EEPROM device. A mask edge (35) overlying an oxide layer (25) on a substrate (15) is undercut a small distance (40), the area surrounding that small distance is built up with oxide (50), then a thin layer of oxide is formed in the undercut distance to serve as a tunneling window (65).