ODD ORDER MESFET FREQUENCY MULTIPLIER
    1.
    发明公开
    ODD ORDER MESFET FREQUENCY MULTIPLIER 失效
    奇MESFET倍频器

    公开(公告)号:EP0896743A4

    公开(公告)日:2000-06-14

    申请号:EP97925422

    申请日:1997-04-29

    发明人: VON STEIN OFRIA M

    CPC分类号: H03B19/14

    摘要: An odd order MESFET frequency multiplier which outputs a desired odd harmonic of a fundamental tone. The frequency multiplier (100) includes a multiplier stage with a MESFET (16) having a harmonic response dependent upon a plurality of bias conditions (24, 26) and the input power level (28). The MESFET (16) includes a drain port (32) coupled to an output matching network (30) sized and configured for a predetermined load (27) at a selected output frequency. The output matching network (30) includes RF shorts (40, 42) for reflecting energy to the MESFET (16) from a plurality of undesired even harmonics. Coupled to the output matching circuit (30) is a bandpass filter (36) sized and configured for the predetermined load (27). The bandpass filter (36) includes RF shorts for reflecting energy to the MESFET (16) from a plurality of undesired odd harmonics, wherein the reflected energy from the undesired even harmonics and the undesired odd harmonics are combined at the MESFET (16) to provide additional energy at the desired odd harmonic.

    FREQUENCY MULTIPLIER
    3.
    发明公开
    FREQUENCY MULTIPLIER 有权
    FREQUENZMULTIPLIZIERER

    公开(公告)号:EP1401094A1

    公开(公告)日:2004-03-24

    申请号:EP02724829.3

    申请日:2002-03-26

    IPC分类号: H03B19/18

    CPC分类号: H03B19/18

    摘要: The invention can be used for telecommunications, measuring and other devices in order to produce stable superhigh frequency signals. An IMPATT diode 4 operating in the cascade break-down mode and having a sharp nonlinearity transforms an input signal in such a way that ultraharmonics which multiple in respect to the frequency of an input signal ω 0 occur in a frequency spectrum. An output stage of a multiplier is used in order to separate an output nω 0 frequency and to suppress adjacent frequencies. In order to tune the output stage to the nω 0 frequency, a tuning plug 8 and short-circuiting pistons 13 are used. The tuning plug 8 is arranged above an upper electrod of the IMPATT diode 4 (inside the axis of the diode). The tuning plugs 13 make it possible to tune resonance capacitance to the nω 0 frequency and remove energy towards the output part of a T-bend in which a wave guide pass-band filter 15 is disposed. Said filter 15 is embodied in the form of sections of a waveguide 14 on whose E-plane a thin metallic diaphragm is arranged, said diaphragm being provided with windows 16 disposed along the axis of the waveguide. The inventive multiplier ensures high converting efficiency.

    摘要翻译: 本发明可用于电信,测量和其他设备,以产生稳定的超高频信号。 以级联分解模式操作并且具有尖锐非线性的IMPATT二极管4以这样的方式转换输入信号,使得在频谱中出现相对于输入信号ω0的频率多个的超谐波。 使用乘法器的输出级以分离输出ωω0频率并抑制相邻频率。 为了将输出级调谐到nωo频率,使用调谐插头8和短路活塞13。 调谐插头8设置在IMPATT二极管4的上电极上方(在二极管的轴线的内部)。 调音塞13使得可以将谐振电容调谐到nω0频率,并且将能量移向其中布置波导通带滤波器15的T形弯曲的输出部分。 所述滤波器15以波导14的部分的形式实现,其E布置有薄的金属隔膜,所述隔膜设置有沿着波导的轴线布置的窗口16。 本发明的乘法器确保了高转换效率。

    Millimeter-wave Frequency Multiplier
    5.
    发明公开
    Millimeter-wave Frequency Multiplier 失效
    毫米波频率。

    公开(公告)号:EP0068457A1

    公开(公告)日:1983-01-05

    申请号:EP82105624.9

    申请日:1982-06-25

    申请人: HONEYWELL INC.

    发明人: Hu, Chi P.

    IPC分类号: H03B19/18

    CPC分类号: H03B19/18

    摘要: A millimeter-wave odd-harmonic frequency multiplier comprises a block member (12) having an RF output port (30) and an RF input port (40) at right angles to one another with a pair of nonlinear resistance type diodes (56, 57) positioned at the intersection of the RF input port and the RF output port.

    Varactor diode frequency multiplier
    6.
    发明公开
    Varactor diode frequency multiplier 失效
    变容二极管倍频器

    公开(公告)号:EP0580357A1

    公开(公告)日:1994-01-26

    申请号:EP93305550.1

    申请日:1993-07-15

    发明人: Nativ, Zvi

    IPC分类号: H03B19/18

    CPC分类号: H03B19/18 H03B19/05

    摘要: An integrated varactor diode frequency multiplier assembly (40) including a first varactor diode frequency multiplier circuit (44) having a non-stepped waveguide output, a second varactor diode frequency multiplier circuit (46) having a similar non-stepped waveguide input and a non-stepped waveguide (60) for integrally connecting the output of the first circuit to the input of the second circuit, wherein the impedance level of the input of the second circuit is similar to the impedance level of the output of the first circuit.

    摘要翻译: 一种集成变容二极管倍频器组件(40),包括具有非阶梯波导输出的第一变容二极管倍频器电路(44),具有类似非阶梯波导输入的第二变容二极管倍频器电路(46)以及非阶梯波导输入 (60),用于将第一电路的输出一体地连接到第二电路的输入,其中第二电路的输入的阻抗电平与第一电路的输出的阻抗电平相似。

    Self biasing diode microwave frequency multiplier
    7.
    发明公开
    Self biasing diode microwave frequency multiplier 失效
    Mikrowellen-Frequenzvervielfacher mit selbstpolarisierender Diode。

    公开(公告)号:EP0244988A1

    公开(公告)日:1987-11-11

    申请号:EP87303572.9

    申请日:1987-04-23

    IPC分类号: H03B19/18

    CPC分类号: H03B19/18 H03B19/05

    摘要: A microwave frequency multiplier employs a first self-biasing unidirectional conductive means (112) such as self-biasing diode means and a second self-biasing unidirectional conductive means (114) such as self-biasing diode means coupled in anti-parallel relationship across a signal input, each of the self-biasing diode means including a diode and a biasing elements. The first self-biasing diode means and second self-biasing diode means cause a bias to occur at internal nodes which increase with increased input power for a broad range of input power levels. The presence of internal biasing results in waveform clipping at higher signal levels. Relative to prior art, the conversion loss will remain optimum up to high input power over an entire high-power input range. The self-biasing diode means in one embodiment comprises a diode coupled in series with a parallel combination of a resistive element (R1) and a capacitive element (C1), the resistive element for developing a voltage drop across the capacitive element suitable to bias the diode, and the capacitive element being of sufficient capacitance to maintain a voltage bias level across the resistive element. The time constant determined by the values of the resistive and capacitive elements should be on the same order of magnitude as the period of the input signal. Addi­tional external bias may be employed in alternative embodiments. In addition, further diodes (D3, D4) may be added to the self-biasing diode means to provide further breakdown protection.

    摘要翻译: 微波倍频器采用第一自偏压单向导电装置(112),诸如自偏压二极管装置和第二自偏压单向导电装置(114),例如自偏压二极管装置,其以反并联关系跨过 信号输入,每个自偏压二极管装置包括二极管和偏置元件。 第一自偏压二极管装置和第二自偏压二极管装置在内部节点处产生偏压,随着输入功率的大范围输入功率的增加而增加。 内部偏置的存在导致在较高信号电平下的波形削波。 相对于现有技术,在整个高功率输入范围内,转换损耗将保持最佳高达高输入功率。 在一个实施例中的自偏压二极管装置包括与电阻元件(R1)和电容元件(C1)的并联组合串联的二极管,用于在电容元件两端形成适于偏置 二极管,并且电容元件具有足够的电容以保持电阻元件两端的电压偏置电平。 由电阻和电容元件的值确定的时间常数应与输入信号的周期相同数量级。 在替代实施例中可以采用额外的外部偏置。 此外,另外的二极管(D3,D4)可以被添加到自偏压二极管装置以提供进一步的击穿保护。