公开(公告)号：EP0300778A3

公开(公告)日：1990-07-25

申请号：EP88306683.9

申请日：1988-07-21

Applicant: GEC-MARCONI LIMITED

Inventor： Russell, John

IPC: H04L11/16 ,  H04B1/74

CPC classification number: H04L12/43 ,  H04L12/433 ,  H04L12/437

Abstract: A ring-shaped network for an aircraft communications control system transmits both digitised audio signals and control data in small packets of equal length from node to node. Each active node comprises a packet-long register (RX) permanently connected in the ring (A), the node having means for labelling each packet it transmits as either full or empty, and having means for testing whether the packet being received is full or empty. The transmission of a new packet of data by that node is prevented unless the packet as received is empty.

Abstract translation: 用于飞行器通信控制系统的环形网络将数字化音频信号和控制数据以相同长度的小数据包从节点发送到另一个节点。 每个活动节点包括永久地连接在环（A）中的分组长寄存器（RX），该节点具有用于标记其全部或空的发送的每个分组的装置，并且具有用于测试所接收的分组是否已满的装置 空。 除非接收到的数据包为空，否则将阻止该节点发送新的数据包。

公开(公告)号：EP0300607A3

公开(公告)日：1990-04-04

申请号：EP88305239.1

申请日：1988-06-08

Applicant: GEC-MARCONI LIMITED

Inventor： Russell, John

IPC: H04L11/16 ,  H04M9/02 ,  H04M3/56

CPC classification number: H04M3/561

Abstract: A ring-shaped network for passing digital audio signals with control signals in packets of equal length in which at least one of the nodes is connected to supply packets received from all transmitting nodes to a sample formatting memory which stores together all the packets obtained during one sample epoch, each packet representing an audio signal from a different transmitting node. The sample formatting memory provides the packets in parallel on a multi-channel output which is gain-adjusted and summed to provide an audio output, for example to the headset of an operator.

Abstract translation: 一种环形网络，用于将具有相等长度的分组中的控制信号的数字音频信号传送到其中至少一个节点被连接以将从所有发送节点接收的分组提供给采样格式化存储器，该样本格式化存储器将一个存储在一个 每个分组表示来自不同发射节点的音频信号。 样本格式化存储器在多通道输出上并行地提供数据包，该多通道输出被增益调整并相加以提供音频输出，例如提供给操作者的耳机。

公开(公告)号：EP0346140A2

公开(公告)日：1989-12-13

申请号：EP89305844.6

申请日：1989-06-09

Applicant: WESTINGHOUSE ELECTRIC CORPORATION

Inventor： Jones, Donald James ,  Poepsel, Donald Awbert ,  Staab, Carl Joseph ,  Houser, Kirk Douglas ,  Ihrman, Robert Thornton ,  Edblad, Warren Albert

IPC: H04L11/16 ,  H04L11/00

CPC classification number: H04L12/407 ,  H04L12/40169 ,  H04L2012/4026

Abstract: A communications arrangement for a distributed process control system operable to control an industrial process (20, 30) where different types of data must be communicated between a number of control drops or stations in varying timing priorities includes a first communica­tion channel (60) on which at least two of the control drops are connected. A second communication channel (70), independent of the first communication channel, accom­modates the communication of a type of data that is not as critical in terms of timing as that which is communicated over the first communication channel. All of the control drops are connected to the second communication channel. A control processor (80), located at each of the control drops, determines the distribution of the types of data between the two communication channels according to a predetermined timing priority.

Abstract translation: 一种用于可操作以控制工业过程（20,30）的分布式过程控制系统的通信布置，其中不同类型的数据必须在变化的时序优先级中的多个控制丢弃或站之间传送，其中包括第一通信信道（60） 连接至少两个控制液滴。 独立于第一通信信道的第二通信信道（70）适应与在通过第一通信信道传送的定时方面不如关键的数据类型的通信。 所有控制液滴都连接到第二通信通道。 位于每个控制液滴处的控制处理器（80）根据预定的定时优先级来确定两个通信信道之间的数据类型的分布。

公开(公告)号：EP0176788B1

公开(公告)日：1989-12-13

申请号：EP85111086.6

申请日：1985-09-03

Applicant: HITACHI, LTD.

Inventor： Hasegawa, Akira ,  Shibata, Takanori ,  Hamano, Fumio

IPC: H04L11/16 ,  H04B9/00 ,  B60R16/02

CPC classification number: H04B10/27 ,  B60R16/0315 ,  H04B10/278 ,  H04L12/42

公开(公告)号：EP0341166A1

公开(公告)日：1989-11-08

申请号：EP89420160.7

申请日：1989-04-28

Applicant: COMPEX AUTOMATION

Inventor： Dutruel, Albain ,  Ryckeboer, Christian

IPC: H04L11/16

CPC classification number: H04L12/4135

Abstract: Le procédé consiste à transmettre des messages sur le mode asynchrone, les messages comprenant un caractère de début de message (CD), un caractère désignant l'adresse du destinataire (AD), éventuelle­ment un caractère désignant l'adresse de l'expéditeur (AE), éventuel­lement des caractères contenant les informations significatives du message (CS), et un caractère de fin de message (CF). Les caractères de début de message (CD) et de fin de message (CF) sont constitués d'une impulsion continue d'une longueur égale au nombre des signaux binaires significatifs d'un caractère normal de message augmenté de deux signaux binaires. Une telle impulsion est reconnue par les circuits de contrôle de trame, dans le cas où les caractères sont dépourvus de signaux binaires de parité ; ils sont reconnus par les signaux de contrôle de parité dans le cas où les caractères sont pourvus de signaux binaires de parité.

Abstract translation: 该方法包括以异步模式发送消息，消息包括消息开始字符（CD），指定收件人（AD）的地址的字符，可能是指定发送者（AE）的地址的字符， 可能包含指示消息（CS）的信息的字符以及消息结束字符（CF）。 消息开始（CD）和消息结束（CF）字符由长度等于表示正常消息字符的二进制信号的数量的连续脉冲组成，该正常消息字符增加了两个二进制信号。 在字符缺少二进制奇偶校验信号的情况下，由帧检查电路识别出这样的脉冲; 在字符确实具有二进制奇偶校验信号的情况下，它们被奇偶校验信号识别。 ... ...

公开(公告)号：EP0332197A2

公开(公告)日：1989-09-13

申请号：EP89104217.8

申请日：1989-03-09

Applicant: FUJITSU LIMITED

Inventor： Nishino, Tetsuo ,  Isono, Osamu ,  Tachibana, Tetsuo ,  Iwabuchi, Eisuke ,  Fukui, Toshimasa

IPC: H04L11/16

CPC classification number: H04J3/085 ,  H04J2203/0041 ,  H04J2203/0042 ,  H04J2203/0071 ,  H04J2203/0073 ,  H04L12/42

Abstract: Disclosed is a ring transmission system which incorporates both a narrowband network and a broadband ISDN network. The system comprises a plurality of nodes connected to a ring line (3). Each node comprises a drop/insert unit (5A, 5B ...) for dropping/inserting data by the use of a communication channel allocated to the node and an allocation changing circuit, whereby, a plurality of independent narrowband and broadband exchange networks are connected to a single ring transmission line (3).

Abstract translation: 公开了一种结合窄带网络和宽带ISDN网络的环形传输系统。 该系统包括连接到环线（3）的多个节点。 每个节点包括用于通过使用分配给节点的通信信道和分配改变电路来丢弃/插入数据的丢弃/插入单元（5A，5B ...），由此，多个独立的窄带和宽带交换网络 连接到单环传输线（3）。

公开(公告)号：EP0222584A3

公开(公告)日：1989-07-19

申请号：EP86308577.5

申请日：1986-11-04

Applicant: UNIVERSITY OF SALFORD ,  Science and Engineering Research Council (SERC)

Inventor： Hampshire, Michael John ,  Ball, Edward ,  Linge, Nigel ,  Owen, Edward Charles Garnet ,  Kummer, Paul Stephen ,  Tasker, Robin

IPC: H04L11/16 ,  H04L11/20

CPC classification number: H04L45/742 ,  H04L12/4625 ,  H04L45/04 ,  H04L45/42

Abstract: A bridge for routing signals between local area networks comprises a list (5A,5B) of source addresses of signal packets arriving at respective sides of the bridge. Means are provided for comparing the destination addresses of the signal packets by a comparator (4A,4B) with addresses in the respective lists. If the comparator does not generate a match, the signal packet is routed through the bridge. Source addresses of received signal packets are added to the respective list, irrespective of the outcome of the previous comparison, and means are provided to remove the oldest entry from each list of source addresses when the list is filled to capacity.

Abstract translation: 用于在局域网之间路由信号的桥​​包括到达桥的相应侧的信号分组的源地址的列表（5A，5B）。 提供了用于将比较器（4A，4B）的信号分组的目的地地址与各列表中的地址进行比较的装置。 如果比较器不产生匹配，则信号包通过该桥路由。 接收的信号分组的源地址被添加到相应的列表中，而不管先前的比较的结果如何，并且提供了当列表被填充到容量时从每个源地址列表中去除最旧的条目的装置。

公开(公告)号：EP0231907A3

公开(公告)日：1989-06-07

申请号：EP87101315.7

申请日：1987-01-30

Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA

Inventor： Kishimoto, Kazuo c/o Mitsubishi Denki K.K.

IPC: H04L11/16 ,  H04B1/74

CPC classification number: H04L12/437 ,  Y10T307/747

Abstract: This invention relates to a duplex loop type transmission system which is so constructed that a plurality of transmission stations are loop-connected with two transmission lines, and the control right for transmission is carried out among said transmission stations. When the trouble, such as disconnection, occurs on the transmission lines and is detected, the station having the control right is adapted to transmit a check signal to the transmission line on which the trouble is detected and the station which receives the check signal returns a response signal to the next station at the side from which the check signal has been transmitted, and the station which receives no response signal carries out the loopback, thereby enabling the clearance of the trouble in a short time.

公开(公告)号：EP0210598A3

公开(公告)日：1989-04-05

申请号：EP86110182.2

申请日：1986-07-24

Applicant: GTE Laboratories Incorporated

Inventor： Amstutz, Stanford R. ,  Eliscu, Mark ,  Rao, Pamidimukkala M. V.

IPC: H04L11/20 ,  H04M11/06 ,  H04Q11/04 ,  H04L11/16

CPC classification number: H04Q11/04 ,  H04L12/64

Abstract: This invention provides a high-speed queue sequencer (850) which may be employed as a component of a link switch or hub switch in a burst-switching communications system. When so employed, transmission speeds for integrated voice and data services over communications links between switches may be equivalent to the T1 rate or higher. A burst is a plurality of bytes which represents, for example, a block of data or a spurt of voice energy sensed by silence/voice detectors located at voice ports. In a preferred embodiment, the architecture of the queue sequencer includes a data/address bus (862), control (860) including a stored program in a 64-bit wide PROM (852), a random-access memory (858) for queue memory which stores administrative information pertaining to bursts passing through the switch, enque means (870) for adding a burst to the list of bursts awaiting assignment to an output channel, and deque means (870) for assigning the highest-priority burst on this list to an output channel and removing the burst from the list, first-in first-out memory (868) for storing requests from switching processors and providing these requests to the control of the queue sequencer within priority class in the same time order as received, and input and output interfaces (864,866) for coupling with the switching processors. A switching processor is a companion high-speed processor employed as one or more components in a link switch and hub switch. Most components of the queue sequencer operate substantially in parallel with and independently of the control, which is a contributing factor to the speed advantage realized by the queue sequencer. The queue sequencer performs queue administration for all switching processors of a link or hub switch.

公开(公告)号：EP0210596A3

公开(公告)日：1989-03-29

申请号：EP86110178.0

申请日：1986-07-24

Applicant: GTE Laboratories Incorporated

Inventor： Amstutz, Stanford R. ,  Haselton, Fletcher E.

IPC: H04Q11/04 ,  H04L11/20 ,  H04L11/16 ,  H04M11/06 ,  G06F15/16

CPC classification number: H04L12/64 ,  H04M11/064 ,  H04Q11/04

Abstract: This invention provides a method of assigning a first control processor to the service set of a second control processor in a distributed-control communications system having control processors coupled with ports of the system. The method comprises the step of transmitting through the system a service-set assignment message in a control burst to the first control processor, the assignment message including the port address of the second control processor. The assignment message may be sent by a third control processor or by the second control processor. The assignment message may be sent as a result of the failure of some control processor, the addition of a new control processor, orto make theworkloads of the control processors more evenly distributed. There is also provided a method of installing a second control processor into a distributed-control communications system having at least one first control processor. The method comprises the steps of installing the hardware, installing the software, and assigning as above the second control processorto the service set of the first control processor. In preferred embodiments, the software may be downloaded and / or started-up within the system. These methods are not dependent on any particular control structure. In the disclosed control hierarchy, a port processor (PP,) may be assigned to the service set of a call (CP,) or administrative processor (AP 2 ), and a call processor may be assigned to the service set of an administrative processor. A control burst is a communication between control processors for administrative purposes in a burst-switching communications system.