Frequency comb generator for synthesizers
    1.
    发明公开
    Frequency comb generator for synthesizers 审中-公开
    频率合成仪

    公开(公告)号:EP1657822A1

    公开(公告)日:2006-05-17

    申请号:EP04292694.9

    申请日:2004-11-10

    申请人: ALCATEL

    发明人: Gris, Marco

    IPC分类号: H03L7/20 H03B21/02

    CPC分类号: H03L7/20 H03B21/00 H03B25/00

    摘要: A circuit arrangement and a method for obtaining a signal for use in downconverting a signal of a relatively high frequency VCO (7). A pulse train (S 1 ) is generated as a function of a reference signal which is then fed into an oscillator (2) so as to generate a signal (S 2 ) modulated by said pulse train (S 1 ). The resulting signal is fed into a band pass filter (4) which in turn outputs a selected frequency band (S 3 ) to be mixed with the signal of VCO (7) in order to obtain the down converted control signal for phase locking.

    摘要翻译: 一种用于获得用于下变频相对较高频率VCO(7)的信号的信号的电路装置和方法。 产生作为参考信号的函数的脉冲串(S 1),然后将其馈入振荡器(2),以产生由所述脉冲串(S 1)调制的信号(S 2)。 所得信号被馈送到带通滤波器(4),带通滤波器(4)又输出与VCO(7)的信号混合的选定频带(S 3),以获得用于锁相的下变频控制信号。

    FREQUENZGENERATOR
    2.
    发明公开
    FREQUENZGENERATOR 审中-公开
    频率发生器

    公开(公告)号:EP1565990A1

    公开(公告)日:2005-08-24

    申请号:EP02781335.1

    申请日:2002-11-28

    IPC分类号: H03L7/091 H03L7/20

    摘要: The invention relates to a frequency generator which comprises a controlled oscillator (16) having a control input and an oscillator output. Said controlled oscillator (16) is adapted to output on the oscillator output an oscillator signal (Sout) having an oscillator frequency that depends on a control signal (SLOC) on the control input. The generator further comprises a scanning device (12) for scanning, by means of a reference frequency, the oscillator signal (Sout) or a signal of the controlled oscillator (16) that is derived from the same in order to obtain a scanned signal (Sd). A low-pass filter (14) is used to low-pass filter the scanned signal (Sd) or a signal derived from the same in order to obtain the control signal (SLOC) or a signal (STP) which is based on the control signal (SLOC). Due to its less complex design, especially the absence of a frequency divider, and the faster adjustability of the actually generated frequency, the inventive frequency generator allows to generate frequencies in an energy-saving manner.

    Analog phase locked oscillator
    3.
    发明公开
    Analog phase locked oscillator 审中-公开
    模拟器相位器Oszillator

    公开(公告)号:EP1313224A2

    公开(公告)日:2003-05-21

    申请号:EP02257923.9

    申请日:2002-11-15

    IPC分类号: H03L7/091 H03L7/20

    CPC分类号: H03L7/20 H03L7/091

    摘要: There is provided a voltage-controlled oscillator (5) whose oscillation frequency is controlled by a control voltage, a reference oscillator (1), and a sampling phase detector (3) for receiving an oscillation signal of the voltage-controlled oscillator and a reference oscillation signal of the reference oscillator and for inputting, to the voltage-controlled oscillator, as the control voltage, an error voltage that is obtained on the basis of a phase difference between the oscillation signal and a harmonic of the reference oscillation signal. An irreversible circuit element (6) is provided between the voltage-controlled oscillator and the sampling phase detector. The oscillation signal that is output from the voltage-controlled oscillator is input to the sampling phase detector via the irreversible circuit element.

    摘要翻译: 提供了由控制电压控制其振荡频率的压控振荡器(5),用于接收压控振荡器的振荡信号的基准振荡器(1)和采样相位检测器(3) 基准振荡器的振荡信号,并输入到压控振荡器作为控制电压,基于振荡信号与基准振荡信号的谐波之间的相位差获得的误差电压。 在压控振荡器和采样相位检测器之间提供不可逆电路元件(6)。 从压控振荡器输出的振荡信号通过不可逆电路元件输入到采样相位检测器。

    Sampling-PLL für hochauflösende Radarsysteme
    4.
    发明公开
    Sampling-PLL für hochauflösende Radarsysteme 有权
    采样PLLfürhochauflösendeRadarsysteme

    公开(公告)号:EP0915570A2

    公开(公告)日:1999-05-12

    申请号:EP98120731.9

    申请日:1998-10-31

    IPC分类号: H03L7/20 H03L7/091

    CPC分类号: H03L7/20 H03L7/091

    摘要: Der Erfindung liegt die Aufgabe zugrunde, eine rauscharme Sampling-PLL für hochauflösende Radarsysteme zu schaffen.
    Diese Aufgabe wird erfindungsgemäß dadurch gelöst, daß die Referenzfrequenzen einem Linienspektrum (SPK) entnommen sind, das durch Mischung einer niedrigen Quarzoszillatorfrequenz (F1) mit einer hohen Quarzoszillatorfrequenz (F2) erzeugt ist, wobei die Quarzoszillatorfrequenzen (F1,F2) synchronisiert sind.
    Die Erfindung findet Anwendung in Sampling-PLLs für hochauflösende Radarsysteme mit einem steuerbaren Frequenzoszillator dessen Ausgangssignal teilweise in einen Rückkopplungszweig ausgekoppelt und in einem Phasenvergleicher mit Referenzfrequenzen verglichen ist.

    摘要翻译: 采样锁相环包括可控频率振荡器,其输出信号被部分馈送到反馈支路中,并在相位比较器中经由石英振荡器产生的参考频率进行比较。 参考频率取自通过将低石英振荡器频率与高石英振荡器频率混合而产生的线谱,两个频率同步。

    Phase locked oscillator
    6.
    发明公开
    Phase locked oscillator 失效
    Phasengeregerter Oszillator。

    公开(公告)号:EP0522879A2

    公开(公告)日:1993-01-13

    申请号:EP92306377.0

    申请日:1992-07-10

    申请人: RAYTHEON COMPANY

    CPC分类号: H03L7/20

    摘要: A SAW stabilized oscillator (10) includes a phase locking circuit (38,16,20,22,36) which is phase locked to a lower frequency reference signal having an odd order difference with respect to the fundamental frequency of the SAW oscillator (14). A mixer (54) is disposed in the phase locking circuitry and is used as a sub-harmonic phase detector by mixing the fundamental (54a) with an odd harmonic (54b) of the reference signal (10a). The mixer output (54c) is filtered (70) and amplified (72,74) before being supplied to the control voltage input terminal (36′) of a voltage controlled variable phase shifter (36) in the SAW oscillator (14) loop (13).

    摘要翻译: SAW稳压振荡器(10)包括相位锁定电路(38,16,20,22,36),锁相电路相对于SAW振荡器(14)的基频具有奇数阶差的较低频率参考信号 )。 混频器(54)设置在锁相电路中,并通过将基波(54a)与参考信号(10a)的奇次谐波(54b)混合而用作次谐波相位检测器。 混频器输出(54c)在被提供给SAW振荡器(14)回路中的电压控制可变移相器(36)的控制电压输入端(36分钟)之前被滤波(70)并放大(72,74) 13)。

    Frequency agile microwave signal generator
    7.
    发明公开
    Frequency agile microwave signal generator 失效
    频率曲线微波信号发生器

    公开(公告)号:EP0434066A3

    公开(公告)日:1991-10-23

    申请号:EP90124969.8

    申请日:1990-12-20

    IPC分类号: H03L7/20

    CPC分类号: H03L7/20 Y10S331/02

    摘要: A frequency synthesized, microwave signal generator (50) is disclosed that provides multiple channel frequency selection capability with rapid channel change time and low levels of spurious signals and noise. The generator (50) uses a microwave harmonic phase locked loop (82) to lock a microwave VCO (68) to a programmable harmonic of a VHF reference crystal oscillator (60) to provide coarse frequency control in steps equal to that reference frequency. The phase lock loop (82) includes an offset mixer (74) for injecting an offset signal frequency to achieve fine frequency control. A harmonic detection and counting scheme is used to rapidly sweep the harmonic loop (82) and to obtain phase lock at the desired harmonic (Figure 1).

    摘要翻译: 公开了一种频率合成的微波信号发生器(50),其提供多信道频率选择能力,具有快速的信道改变时间和低水平的杂散信号和噪声。 发生器(50)使用微波谐波锁相环(82)将微波VCO(68)锁定到VHF参考晶体振荡器(60)的可编程谐波,以提供等于该参考频率的步长的粗略频率控制。 锁相环(82)包括用于注入偏移信号频率以实现精细频率控制的偏移混频器(74)。 谐波检测和计数方案用于快速扫描谐波回路(82)并获得所需谐波的锁相(图1)。

    Générateur de fréquence pour un équipement radiofréquence et procédé pour générer un signal de sortie
    8.
    发明公开
    Générateur de fréquence pour un équipement radiofréquence et procédé pour générer un signal de sortie 审中-公开
    一种用于射频设备和方法,用于产生输出信号的频率发生器

    公开(公告)号:EP2642665A1

    公开(公告)日:2013-09-25

    申请号:EP13159852.6

    申请日:2013-03-19

    申请人: Thales

    IPC分类号: H03L7/20

    摘要: L'invention concerne un générateur de fréquence pour un équipement radiofréquence pour générer un signal de sortie ayant une fréquence de sortie (F s ) prédéterminée, le générateur de fréquence comprenant : un oscillateur local (3) pour générer un signal de référence ayant une fréquence de référence (Fref), et une boucle à verrouillage de phase (5), la boucle à verrouillage de phase étant munie d'un oscillateur contrôlé (25) générant le signal de sortie ayant la fréquence de sortie (F s ) en fonction d'un signal à son entrée, et d'un comparateur (21) fournissant un signal à l'oscillateur contrôlé (25) en fonction d'une comparaison (C) de phase et/ou de fréquence d'un premier signal de comparaison (Fcomp1) basé sur un signal d'entrée appliqué à une première entrée (16) de la boucle à verrouillage de phase (5) avec un deuxième signal de comparaison (Fcomp2) basé sur le signal de sortie, le générateur de fréquence (1) comprenant en outre au moins un générateur d'harmonique (7) propre à générer, à partir du signal de référence, un signal d'harmonique comportant une harmonique prédéterminée (F H ) du signal de référence, le générateur de fréquence étant propre à appliquer le signal d'harmonique de l'un des générateurs d'harmonique à la première entrée (16) de la boucle à verrouillage de phase (5). En outre, la présente invention concerne un procédé pour générer un signal de sortie.

    摘要翻译: 所述发电机(1)具有一个比较器(21)提供一个信号到控制振荡器(25),在输入信号根据比较信号的相位或频率比较的功能应用到一个相位的输入(16) 锁定环(5)与基于输出信号的另一比较信号。 谐波发生器(7)是angepasst生成,从参考信号,一个谐波信号包括参考信号,其中,所述发电机是angepasst到谐波信号施加到锁相环的输入的预先设定的高次谐波。 因此独立claimsoft包括用于在输出信号产生具有使用本地振荡器预先设置的输出频率的方法。

    Analog phase locked oscillator
    9.
    发明公开
    Analog phase locked oscillator 审中-公开
    模拟锁相振荡器

    公开(公告)号:EP1313224A3

    公开(公告)日:2004-01-28

    申请号:EP02257923.9

    申请日:2002-11-15

    IPC分类号: H03L7/091 H03L7/20

    CPC分类号: H03L7/20 H03L7/091

    摘要: There is provided a voltage-controlled oscillator (5) whose oscillation frequency is controlled by a control voltage, a reference oscillator (1), and a sampling phase detector (3) for receiving an oscillation signal of the voltage-controlled oscillator and a reference oscillation signal of the reference oscillator and for inputting, to the voltage-controlled oscillator, as the control voltage, an error voltage that is obtained on the basis of a phase difference between the oscillation signal and a harmonic of the reference oscillation signal. An irreversible circuit element (6) is provided between the voltage-controlled oscillator and the sampling phase detector. The oscillation signal that is output from the voltage-controlled oscillator is input to the sampling phase detector via the irreversible circuit element.

    Phase locked oscillator
    10.
    发明公开
    Phase locked oscillator 失效
    相位锁定振荡器

    公开(公告)号:EP0522879A3

    公开(公告)日:1993-03-31

    申请号:EP92306377.0

    申请日:1992-07-10

    申请人: RAYTHEON COMPANY

    CPC分类号: H03L7/20

    摘要: A SAW stabilized oscillator (10) includes a phase locking circuit (38,16,20,22,36) which is phase locked to a lower frequency reference signal having an odd order difference with respect to the fundamental frequency of the SAW oscillator (14). A mixer (54) is disposed in the phase locking circuitry and is used as a sub-harmonic phase detector by mixing the fundamental (54a) with an odd harmonic (54b) of the reference signal (10a). The mixer output (54c) is filtered (70) and amplified (72,74) before being supplied to the control voltage input terminal (36′) of a voltage controlled variable phase shifter (36) in the SAW oscillator (14) loop (13).