公开(公告)号：JP2003052175A

公开(公告)日：2003-02-21

申请号：JP2002158167

申请日：2002-05-30

Applicant: Nec Miyagi Ltd ,  宮城日本電気株式会社

Inventor： WATANABE KIYOHIKO

IPC: H02M7/21 ,  H02M3/28

Abstract: PROBLEM TO BE SOLVED: To provide a multi-output switching power supply circuit which can improve power supply conversion efficiency, and to easily provide multiple outputs.
SOLUTION: Since a circuit configuration is formed, by combining an NMOS for synchronous rectification, in place of a diode for rectification and commutation which has been used in the existing multiple-output switching power supply circuit, and a constant voltage control with a magnification amplifier, the heat- radiating process by a radiator or the like can be eliminated to realize reduction in the size of apparatus, higher efficiency and low-voltage/multiple-output. Moreover, since a magamp 131 is inserted between a secondary coil 123 and a NMOS 132 for synchronous rectification and a drive circuit of the NMOSs 132, 133 for synchronous rectification is formed with a coil other the secondary coil 123, the NMOS 132 for synchronous rectification is no longer formed within a loop, in which a reset current flows, and the constant voltage control by the magamp can be realized, without being influenced by the cut-off conditions of control loop which is formed, when the NMOS for rectification 132 is turned OFF.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：提供一种可以提高电源转换效率的多输出开关电源电路，并且容易提供多个输出。 解决方案：由于形成电路配置，通过组合用于同步整流的NMOS代替用于现有多输出开关电源电路中的用于整流和换向的二极管，以及具有放大放大器的恒定电压控制 可以消除散热器等的散热处理，实现设备尺寸的降低，效率更高，低压/多输出。 此外，由于将magamp 131插入到用于同步整流的次级线圈123和NMOS 132之间，并且用于同步整流的NMOS 132,133的驱动电路由次级线圈123，同步整流用NMOS 132 不再形成在其中复位电流流动的环路中，并且当整流132的NMOS为正整数时，可以实现由马氏体的恒定电压控制，而不受所形成的控制环的截止条件的影响 关掉。

公开(公告)号：JP2003037622A

公开(公告)日：2003-02-07

申请号：JP2001222352

申请日：2001-07-24

Applicant: Nec Miyagi Ltd ,  宮城日本電気株式会社

Inventor： TAKAHASHI SHIN

IPC: H04L12/885 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To provide an ATM transmitter capable of discriminating the level of the buffer capacity for securing absorption of delay fluctuation without preparing special cell. SOLUTION: A first ATM transmitter 201 is connected to a second ATM transmitter 202 through an ATM network 203. A cell sent out from the first ATM transmitter 201 is designated with a loop-back and a time stamp, and the second ATM transmitter 202 places the time stamp on the 'non-used 2' field of the cell 216 and sends the cell to the first ATM transmitter 201. The first transmitter 201 obtains a difference between a receiving time and the time stamp and further determines the required buffer capacity from the quantity of a change from the difference of the other similar cell. Even when a PVC velocity is fluctuated, the buffer capacity is increased by increasing the change amount.

Abstract translation: 要解决的问题：提供能够区分缓冲能力的水平以确保延迟波动的吸收的ATM发送器，而不需要准备专用小区。 解决方案：第一ATM发送器201通过ATM网络203连接到第二ATM发送器202.从第一ATM发送器201发出的一个单元用循环和时间戳指定，第二ATM发送器202放置 单元216的“未使用2”字段上的时间戳，并将该单元发送到第一ATM发送器201.第一发送器201获得接收时间和时间戳之间的差，并进一步确定所需的缓冲器容量 从其他类似单元格的差异变化的数量。 即使当PVC速度波动时，通过增加变化量来增加缓冲容量。

公开(公告)号：JP2003029217A

公开(公告)日：2003-01-29

申请号：JP2001211787

申请日：2001-07-12

Applicant: Nec Miyagi Ltd ,  宮城日本電気株式会社

Inventor： KIMURA MADOKA

IPC: G02F1/01 ,  H01S5/026 ,  H01S5/042 ,  H01S5/062

CPC classification number: H01S5/042 ,  H01S5/0265 ,  H01S5/0427 ,  H01S5/06216

Abstract: PROBLEM TO BE SOLVED: To provide a light modulator driving circuit capable of the output terminal voltage of a driving IC from exceeding the breakdown voltage and effectively preventing dielectric breakdown from being caused. SOLUTION: The main current path (drain-source or collector-emitter) of a transistor 12 for clamping voltage is connected in series with the output terminal 9 of the driving IC 1, and a specified voltage is applied to the control electrode (gate or base). A light modulator 10 such as a laser diode is connected with the output side of this transistor 12 directly or via an AC coupling capacitor 16. Thus, the voltage of the output terminal 9 is set to the breakdown strength of the driving IC 1 or lower.

Abstract translation: 要解决的问题：提供一种能够使驱动IC的输出端子电压超过击穿电压的光调制器驱动电路，并且有效地防止引起电介质击穿。 解决方案：用于钳位电压的晶体管12的主电流路径（漏极源极或集电极 - 发射极）与驱动IC1的输出端子9串联连接，并且将特定的电压施加到控制电极（栅极或 基础）。 诸如激光二极管的光调制器10直接或通过AC耦合电容器16与该晶体管12的输出侧连接。因此，输出端子9的电压被设置为驱动IC 1的击穿强度或更低 。

公开(公告)号：JP2003023436A

公开(公告)日：2003-01-24

申请号：JP2001207221

申请日：2001-07-09

Applicant: Nec Corp ,  Nec Miyagi Ltd ,  宮城日本電気株式会社 ,  日本電気株式会社

Inventor： KUNINOBE KANEI ,  TANAKA KAZUAKI

IPC: H04L12/437

Abstract: PROBLEM TO BE SOLVED: To provide a generating method of ring configuration information (ring topology map), by which each node can automatically update the ring topology map at a high-speed.
SOLUTION: When generating the ring topology map, by using node ID values of nodes configuring a ring network as MAP information values and sequentially loading the ID values from the top node to the last node to MAP information in one direction of the ring, each node 1 transmits the MAP information, including its own ID value at a top of the MAP information, to a next stage (node); loads the ID value included in the top information value of the information received from a preceding stage (node) to the last transmission sequence of the information; sequentially loads the ID value, received successively to a prescribed transmission sequence of the information, receives the ID value from the preceding stage node until the ring topology map loading the ID values stored in the transmission sequence of the information is continuously the same; and sequentially transmits the ID value loaded to the transmission sequence of the information to the next stage load. An overhead byte is desirably used for the ID values transmitted/received.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：提供环形配置信息（环形拓扑图）的生成方法，通过该环形配置信息，每个节点可以以高速自动更新环形拓扑图。 解决方案：在生成环形拓扑图时，通过使用配置环网的节点ID值作为MAP信息值，并将ID值从顶层节点到最后节点顺序加载到环的一个方向的MAP信息，每个节点 1将MAP信息（包括其自身的ID值在MAP信息的顶部）发送到下一级（节点）; 将从前一级（节点）接收的信息的顶部信息值中包含的ID值加载到信息的最后传输序列; 依次加载接收到信息的规定传输序列的ID值，从前一级节点接收ID值，直到环路拓扑图加载存储在信息的传输序列中的ID值连续相同; 并且顺序地将加载到信息的传输序列的ID值发送到下一级负载。 期望地使用开销字节用于发送/接收的ID值。

公开(公告)号：JP2003008597A

公开(公告)日：2003-01-10

申请号：JP2001188506

申请日：2001-06-21

Applicant: Nec Miyagi Ltd ,  宮城日本電気株式会社

Inventor： SATO SHIZUE

IPC: H04B10/27 ,  H04B10/03 ,  H04B10/077 ,  H04B10/275 ,  H04L12/42 ,  H04L12/423 ,  H04L12/437 ,  H04B10/20

Abstract: PROBLEM TO BE SOLVED: To provide a clock path changeover method that suppress the generator of clock path switching to the utmost so as to obtain clock selection with high quality order.
SOLUTION: A ring network is configured, where a master node 10, a sub master node 30, and slave nodes 20, 40 are interconnected by synchronous digital hierarchy(SDH) duplicate optical transmission lines 50, 50, on the occurrence of a fault in a clock whose quality order is higher, after transmission direction is switched from a usual clockwise direction into a counter clockwise direction, even when the higher quality clock having been faulty is restored, the quality order of the faulty clock is tentatively lowered by one level, no switch back takes place when the network is in operation with the clock whose quality is equal to that of the initial clock, when a fault takes place in the clock of a switching destination, the quality order of the clock having been already restored is restored to the original quality order and the clock with the highest quality level is selected among clocks to be selectable at that point of time.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：提供一种时钟路径切换方法，其最大限度地抑制时钟路径切换的发生器，以便以高质量顺序获得时钟选择。 解决方案：配置环形网络，其中主节点10，子主节点30和从节点20,40通过同步数字层级（SDH）复制光传输线路50,50互相连接，在发生故障时 即使在高质量的时钟故障恢复的情况下，即使将传输方向从通常的顺时针方向切换成逆时针方向后，其质量顺序更高的时钟，故障时钟的质量顺序暂时降低一级， 当切换目的地的时钟发生故障时，当网络与质量等于初始时钟的时钟同时工作时，不会发生切换，恢复时钟的质量顺序被恢复 在最初的质量顺序中选择具有最高质量级别的时钟，以便在该时间点可选择。

公开(公告)号：JP2003008433A

公开(公告)日：2003-01-10

申请号：JP2001192590

申请日：2001-06-26

Applicant: Nec Miyagi Ltd ,  宮城日本電気株式会社

Inventor： FUKUDA MINORU

IPC: H03L7/14 ,  H03L7/093 ,  H03L7/10

Abstract: PROBLEM TO BE SOLVED: To provide a PLL circuit with less jitter and a short phase lockup time. SOLUTION: The PLL circuit for synchronizing phases of two input frequency signals is provided with a phase difference detection means that outputs a phase difference of the two input signals, an integration circuit that smoothes the phase difference, and an integration circuit input control means that is connected between the phase difference detection means and the integration circuit and brings a high impedance to the output when the phase difference is within a prescribed range and fixes the output to an H or L level when the phase difference is deviated from the prescribed range.

Abstract translation: 要解决的问题：提供具有较少抖动和短相位锁定时间的PLL电路。 解决方案：用于同步两个输入频率信号的相位的PLL电路设置有输出两个输入信号的相位差的相位差检测装置，平滑相位差的积分电路，以及积分电路输入控制装置， 连接在相位差检测装置和积分电路之间，当相位差在规定范围内时对输出产生高阻抗，并且当相位差偏离规定范围时将输出固定为H或L电平。

公开(公告)号：JP2002374188A

公开(公告)日：2002-12-26

申请号：JP2001180621

申请日：2001-06-14

Applicant: Nec Miyagi Ltd ,  宮城日本電気株式会社

Inventor： YAHAGI HIDEYUKI

IPC: H04B10/03 ,  H04B1/74 ,  H04B10/032 ,  H04B10/077 ,  H04J14/00 ,  H04J14/02 ,  H04B10/02

Abstract: PROBLEM TO BE SOLVED: To provide a wavelength multiplex communication system, which enables rapid maintenance operation if a trouble occurs in an optical transmitter receiver, and to provide a transmission line switching system for the wavelength multiplex communication system.
SOLUTION: Wavelength multiplex transmission devices, each being equipped with a plurality of optical transmitter receivers, a multiplexer, and a demultiplexer are provided for two systems, i.e., an in-use system and a standby system and switched and controlled by a redundant switching device in the transmission switching system. Each optical transmitter receiver is equipped with an integrated type optical transmission part, an optical reception part, a fault monitor part which monitors faults, and a transmission control part which controls the signal transmission of the optical transmission part. If a fault occurs in the optical reception part 15a of the in-use system, the fault monitor part 16a informs the redundant switching device 5 and transmission control part 17a of the fault, and the redundant switching device 5, having been informed of the fault, switches the path of a received light signal to the standby system; and the transmission control part 17a stops the signal transmission of the optical transmission part 14a and the redundant switching device 8, having recognized the signal stop from the optical transmission part 14a, switches the path of a transmitted light signal to the standby system.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：提供一种波长多路通信系统，其能够在光发射机接收机中发生故障时进行快速维护操作，并提供用于波长多路通信系统的传输线路交换系统。 解决方案：为两个系统（即，使用中的系统和备用系统）提供了配备有多个光发射机接收机，多路复用器和解复用器的波分复用传输设备，并由冗余交换设备 在传输切换系统中。 每个光发射机接收机配备有集成型光传输部分，光接收部分，监视故障的故障监视部分和控制光传输部分的信号传输的传输控制部分。 如果在使用中系统的光接收部15a出现故障，则故障监视部16a向故障的冗余切换装置5和发送控制部17a通知冗余切换装置5，通知故障 将接收的光信号的路径切换到备用系统; 并且传输控制部分17a停止从光传输部分14a识别出信号停止的光传输部分14a和冗余切换装置8的信号传输，将传输光信号的路径切换到备用系统。

公开(公告)号：JP2002368866A

公开(公告)日：2002-12-20

申请号：JP2001169550

申请日：2001-06-05

Applicant: Nec Miyagi Ltd ,  宮城日本電気株式会社

Inventor： KOMINATO TETSUO

IPC: H04M3/56 ,  H04M1/60 ,  H04M11/00

Abstract: PROBLEM TO BE SOLVED: To provide a transmission level adjustment method for a voice confer ence system that can adjust a voice level of a conference opposite party even during a phone conference.
SOLUTION: Phone conference terminals 6 of stations A, B are connected by a telephone network 10 (a public telephone line or a private telephone line), and the station A is provided with a control signal transmission circuit 1 that outputs a transmission level adjustment signal by an operation entry of a dial key being a user interface to adjust a transmission level of the station B, a level adjustment signal detection circuit 2 that detects the transmission level adjustment signal from the station B, a transmission level control circuit 3 that receives a signal detected by the level adjustment signal detection circuit 2 to apply adjustment control to the transmission level, a voice signal branching coupling circuit 4 that has a transmission level adjustment function controlled by the transmission level control circuit 3 and a plurality of headsets 5.
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：提供一种即使在电话会议期间也可以调整会议对方的语音电平的语音会议系统的发送电平调整方法。 解决方案：站A，B的电话会议终端6通过电话网10（公用电话线或专用电话线）连接，站A设置有控制信号发送电路1，其输出发送电平调整信号 通过作为调整站B的发送电平的用户接口的拨号键的操作输入，检测来自站B的发送电平调整信号的电平调整信号检测电路2，发送电平控制电路3， 由电平调整信号检测电路2检测到的信号，以将调整控制应用于发送电平，语音信号分支耦合电路4具有由发送电平控制电路3控制的发送电平调整功能和多个耳机5。

公开(公告)号：JP2002368726A

公开(公告)日：2002-12-20

申请号：JP2001173523

申请日：2001-06-08

Applicant: Nec Corp ,  Nec Miyagi Ltd ,  宮城日本電気株式会社 ,  日本電気株式会社

Inventor： FURUKAWA JUN ,  NOZAWA YOSHIAKI ,  ARASAWA YASUHIRO

IPC: H04L7/00 ,  G06F5/12 ,  H04N7/24 ,  H04N7/62

CPC classification number: G06F5/12 ,  G06F2205/061 ,  H04N21/4305 ,  H04N21/64307

Abstract: PROBLEM TO BE SOLVED: To remarkably enhance a tracking characteristic of transmission line jitter more than a conventional adaptive clock regenerating method.
SOLUTION: A write counter (2) counts the number of transmission clocks (b) to generate a transmission write count (f). When a resident quantity of an FIFO buffer memory (1) reaches a prescribed value, a voltage-controlled crystal oscillator (3) generates a reception regenerating clock (c). A read counter (4) counts the reception regenerating clock (c) to generate a reception read count (g). An oscillator counter (6) counts a reference time on the basis of an independent clock (d) to generate an independent time count (h). Arithmetic means (7, 8, 9) calculate a voltage control signal (i) on the basis of the three counts (f), (g), (h). A digital/analog converter (10) applies digital/analog conversion to a digital voltage control signal to give a voltage control signal (e).
COPYRIGHT: (C)2003,JPO

Abstract translation: 要解决的问题：比传统的自适应时钟再生方法更显着地提高传输线抖动的跟踪特性。 解决方案：写计数器（2）对发送时钟（b）的数量进行计数以生成发送写入计数（f）。 当FIFO缓冲存储器（1）的驻留量达到规定值时，压控晶体振荡器（3）产生接收再生时钟（c）。 读计数器（4）对接收再生时钟（c）进行计数以产生接收读数（g）。 振荡器计数器（6）基于独立时钟（d）对参考时间进行计数，以产生独立的时间计数（h）。 算术装置（7,8,9）基于三个计数（f），（g），（h）计算电压控制信号（i）。 数字/模拟转换器（10）将数字/模拟转换应用于数字电压控制信号以给出电压控制信号（e）。