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公开(公告)号：JPH01152808A
公开(公告)日：1989-06-15
申请号：JP31271787
申请日：1987-12-10
发明人： KITAYAMA HIROTOSHI
摘要： PURPOSE:To improve the distortion factor of an output signal at attenuation by adding a current source to a current mirror circuit of an electronic volume of a conventional Gilbert circuit form so as to give an idling current. CONSTITUTION:Emitters of NPN transistors(TR) 5, 6 are connected in common to a current signal source 3, a collector of an NPN TR 5 is connected to a base, a collector of a PNP TR 7 of a current mirror circuit comprising PNP TRs and a base of a PNP TR 8 and a current source 1, a collector of the NPN TR 6 is connected to a power supply, emitters of the PNP TRs 7, 8 are connected to a power supply VCC via reistors 9,10 respectively, the collector of the PNP TR 8 is connected to ground via a resistor 11, an output voltage control voltage source 2 is connected to a base of the NPN TR 5 and a reference voltage source 4 is connected to the base of the NPN TR 6. The collector of the PNP TR 8 is used as an output terminal Vout to control the voltage of the output voltage control power supply thereby controlling the output voltage of the output terminal.
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公开(公告)号：JPS63280504A
公开(公告)日：1988-11-17
申请号：JP9191488
申请日：1988-04-15
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公开(公告)号：JPS63198409A
公开(公告)日：1988-08-17
申请号：JP3087487
申请日：1987-02-13
申请人： NEC CORP
发明人： SENBA TAKASHI
摘要： PURPOSE:To reduce the quantity of distortion production by supplying also a constant current to each of two sets of differential pairs each consisting of a transistor pair so as to prevent a variable current value from being a prescribed value or below. CONSTITUTION:A current flowing to transistors (TRs) TRQ1, TRQ4 of the differential pair having a high gain by connection resistors RE1, RE4 from TRs Q1, Q4 is controlled in response to the control voltage fed to control terminals 21, 22, a current flowing to TRs Q2, Q3 having a similar low gain is controlled and the input signal fed to input signal terminals 11, 12 is amplified by a prescribed gain. A constant current from a constant current source 40 corresponding to each of the TRs Q1, Q4 and Q2, Q3 of the differential pair is supplied and the minimum value of the variable current applying gain control is not zero but limited to a constant current. As a result, the nonlinear distortion at a small current region is mitigated and reduced.
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公开(公告)号：JPS63169106A
公开(公告)日：1988-07-13
申请号：JP128687
申请日：1987-01-06
申请人： NEC CORP
发明人： HIRASAWA MASAHIRO , MIURA MASAMI
摘要： PURPOSE:To reduce distortion and to facilitate the integration of the titled circuit by connecting two diodes in inverse direction in series connection, and connecting one end with a coil, the other end to a reference potential point, and the middle point to a current source for gain control. CONSTITUTION:On a primary side of the coil 1, a tuning circuit to select a signal of a desired frequency is constituted, and thus selected signal is transmitted to a secondary side as a signal current. One end of the secondary side of coil is connected to a DC power source, and the other end to the anode of the diode 3. The anode of the diode 6 is connected to the power source and its cathode, as well as that of the diode 3, is connected to the constant current source 4 for gain control. An output is taken out from the anode of the diode 3, and amplified by a high-frequency amplifier part 2. Consequently, a gain control circuit whose distortion due to the non-linearity of impedance of diode is small suitable for circuit integration, can be obtained.
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公开(公告)号：JPS63114406A
公开(公告)日：1988-05-19
申请号：JP25836186
申请日：1986-10-31
发明人： IKEDA YUKIHISA
摘要： PURPOSE:To control gain in a wide range under low distortion and a high SN ratio by controlling the current values of current sources for respective differential amplifiers in a variable amplifier circuit constituted of the two differential amplifiers under prescribed relation. CONSTITUTION:When the corrector current of a transistor (TR) Q14 is increased by DELTAI by increasing the voltage VBEC between the base and emitter of a TR Q16, a current value from the 2nd current source IB is increased by 1/nDELTAI in accordance with the area ratio 1:n of the emitters of the TRs Q13, Q14. Since the current value of the 3rd current source IE is fixed, the collector current of the TR Q12 is reduced by DELTAI and the current of the 1st current source IA is reduced by 1/mDELTAI in accordance with the area ratio 1:m of the emitters of the TRs Q11, Q12. Namely, the changeing ratio of the IA and IB can be optionally changed in accordance with the setting of the emitter areas of the TRs Q12, Q14. When values (m), (n) are determined as mnot equal to n and the IA and IB are simultaneously changed by different changing ratios though m=n=1 is formed in an ordinary circuit, gain control in a wide range can be attained.
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公开(公告)号：JPS62120111A
公开(公告)日：1987-06-01
申请号：JP26012885
申请日：1985-11-20
发明人： USUI AKIRA
摘要： PURPOSE:To reduce the effect of a change in the input capacitance of the 1st gate of an FET transistor (TR) onto a tuning by providing a coupling varactor diode whose reverse bias capacitance is changed in interlocking with the change in a tuning potential between an input tuning circuit and an amplification FET TR. CONSTITUTION:An input signal is given as a balanced input from a terminal 1A and subjected to balanced/unbalanced conversion between an input transformer 11 and a resonance line 12. A tuning potential is given to a varactor diode 15 from a terminal 1B via a bias resistor. A signal through a coupling varactor diode 16 is fed to the 1st gate of a TR 19 via a coupling capacitor 18. An AGC potential is given to the 2nd gate from a terminal 1C. Since the same reverse bias is given to the diodes 15, 16, the change in the input capacitance of the 1st gate is hardly susceptible.
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公开(公告)号：JPS6238012A
公开(公告)日：1987-02-19
申请号：JP17720485
申请日：1985-08-12
申请人： TOSHIBA CORP
发明人： FUJII TOSHIKAZU
摘要： PURPOSE:To improve the noise characteristic by connecting an emitter follower transistor (TR) to an output of an operational amplifier bringing an input terminal of the titled circuit to an imaginary common level and providing a current mirror circuit to the collector of said emitter follower TR. CONSTITUTION:The input terminal 110 is connected to an inverting input terminal of the operational amplifier 112 whose non-inverting input terminal is connected to common and connected to an emitter of a TR 114 whose base is connected to an output terminal of the operational amplifier 112. The collector and base of a TR 116 of diode connection are connected. Further, the collector of the TR 114 and the collector of a TR 118 are connected to the current mirror circuit 122 supplying the collector current of the TR 114 to the TR 118.
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公开(公告)号：JPS619766B2
公开(公告)日：1986-03-26
申请号：JP7134676
申请日：1976-06-17
申请人： Sony Corp
发明人： OOSAWA MITSUO
CPC分类号： H03G3/10 , G06G7/163 , H03G1/0082
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公开(公告)号：JPS58133016A
公开(公告)日：1983-08-08
申请号：JP1516282
申请日：1982-02-02
发明人： YUDA MINORU
摘要： PURPOSE:To reduce an effect of the DC drift, by controlling the gain of the 1st amplifier and at the same time feeding negatively the DC output level of the output of the 1st amplifier back to the input side as well as to the 2nd amplifier. CONSTITUTION:It is possible to control the gain of the 1st amplifier consisting of a direct-coupled 2-stage amplifier of an emitter earth circuit 2B and an emitter follower circuit 3B. At the same time, the DC output level of the 1st amplifier is negatively fed back to the input side. This DC output level is divided and fed negatively back to the input side of the 2nd amplifier consisting of a direct-coupled 2-stage amplifier of an emitter earth circuit 6B and an emitter follower circuit 7B. As a result, the same DC operation conditions are secured for the collector current, etc. and the gain can be controlled to the same level between the 1st and 2nd amplifiers. At the same time, it is possible to reduce an effect of the voltage drift between the base and the emitter of transistors Q1- Q4.
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