公开(公告)号：JP2010148094A

公开(公告)日：2010-07-01

申请号：JP2009240433

申请日：2009-10-19

Applicant: Honeywell Internatl Inc ,  ハネウェル・インターナショナル・インコーポレーテッド

Inventor： WERKING PAUL M

IPC: H03F3/45

CPC classification number: H03F3/45183 ,  G05F3/30 ,  H03F3/45475

Abstract: PROBLEM TO BE SOLVED: To obtain a single analog element which functions as both of an operational amplifier and a CCII.
SOLUTION: An amplifier 100 is configured by a differential amplifier circuit 102, and a non-inverting output stage 104, and the differential amplifier circuit 102 has an input stage 106 for receiving two voltage inputs, and an output stage 108 for providing a current output. The amplifier functions as an operational amplifier which is a first mode when two current outputs I
OUT1 and I
OUT2 are combined as one, while functions as a type 2 current carrier device (CCII) which is a second mode when a second current output I
OUT2 is combined with a second voltage input V
N .
COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：获得用作运算放大器和CCII两者的单个模拟元件。 解决方案：放大器100由差分放大器电路102和非反相输出级104构成，并且差分放大器电路102具有用于接收两个电压输入的输入级106和用于提供 当前输出。 当两个电流输出I OUT1 和I OUT2 组合时，放大器用作运算放大器，它是第一模式，同时用作2型当前载波器件 CCII），当第二电流输出I OUT2 与第二电压输入V N 组合时，其是第二模式。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2008236724A

公开(公告)日：2008-10-02

申请号：JP2007328682

申请日：2007-12-20

Applicant: Honeywell Internatl Inc ,  ハネウェル・インターナショナル・インコーポレーテッド

Inventor： WERKING PAUL M

IPC: H03K5/04 ,  H03K3/037 ,  H03K5/13

CPC classification number: H03K3/017 ,  H03K5/1565

Abstract: PROBLEM TO BE SOLVED: To provide a method and a circuit for correcting duty cycle distortion.
SOLUTION: The present invention relates to the method and circuit for correcting duty cycle distortion. A delay insertion gate corrects data dependent delay distortion that is generated in CMOS flip-flop circuits. The delay insertion gate includes two field effect transistors and a current mirror. The two transistors each respectively receive an input signal from an upstream circuit. At least one of the transistors is coupled to an output node. The output node temporarily holds a voltage state within the delay insertion gate, correcting any distortion in the duty cycle of the input signals.
COPYRIGHT: (C)2009,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于校正占空比失真的方法和电路。 解决方案：本发明涉及用于校正占空比失真的方法和电路。 延迟插入门校正在CMOS触发器电路中产生的依赖于数据的延迟失真。 延迟插入门包括两个场效应晶体管和电流镜。 两个晶体管分别从上游电路接收输入信号。 至少一个晶体管耦合到输出节点。 输出节点临时保持延迟插入门内的电压状态，校正输入信号的占空比中的任何失真。 版权所有（C）2009，JPO＆INPIT

公开(公告)号：JP2008157910A

公开(公告)日：2008-07-10

申请号：JP2007160957

申请日：2007-06-19

Applicant: Honeywell Internatl Inc ,  ハネウェル・インターナショナル・インコーポレーテッド

Inventor： WERKING PAUL M

IPC: G01P15/13

CPC classification number: H03K5/24 ,  G01P15/125 ,  G01P15/131 ,  G01P2015/0831

Abstract: PROBLEM TO BE SOLVED: To provide a torque driver that includes a regulator circuit for mitigating zero-g discontinuity effects and deadbanding. SOLUTION: An accelerometer may include the torque driver and the torque driver may be arranged to receive a control signal from a control circuit that is coupled to a deflection sensing circuit. When the accelerometer undergoes an acceleration, the deflection sensing circuit generates an acceleration signal that is communicated to the control circuit. The control circuit responsively generates a control signal, which the torque driver uses to balance a proof mass beam within the accelerometer. The regulator circuit mitigates zero-g discontinuity effects and deadbanding by preventing the torque signal from producing torque signals that simultaneously track the control signal. To do this, the regulator circuit may include a rectifying buffer and/or a modulator. COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种扭矩驱动器，其包括用于减轻零g不连续效应和死区的调节器电路。 解决方案：加速度计可以包括扭矩驱动器，并且扭矩驱动器可以被布置成从耦合到偏转感测电路的控制电路接收控制信号。 当加速度计经受加速度时，偏转感测电路产生传递给控制电路的加速度信号。 控制电路响应地产生控制信号，扭矩驱动器用于平衡加速度计内的证明质量束。 调节器电路通过防止转矩信号产生同时跟踪控制信号的转矩信号来减轻零g不连续效应和死区。 为此，调节器电路可以包括整流缓冲器和/或调制器。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：JP2014225876A

公开(公告)日：2014-12-04

申请号：JP2014100235

申请日：2014-05-14

Applicant: ハネウェル・インターナショナル・インコーポレーテッド ,  Honeywell Internatl Inc

Inventor： WERKING PAUL M

IPC: H03F3/45 ,  H03F3/68 ,  H03G3/12

CPC classification number: H03G3/00 ,  H03F1/3211 ,  H03F3/45475 ,  H03F2200/261 ,  H03F2203/45138 ,  H03F2203/45522 ,  H03F2203/45528 ,  H03G1/0035 ,  H03G1/0088

Abstract: 【課題】伝送ゲート歪みをもたらすことなく、可変利得電流コンベアベースの計装増幅器を提供する。【解決手段】可変利得計装増幅器120は、第1入力電圧を受け取る第1デュアル出力相互コンダクタンス増幅器(DOTA)(即ち電流コンベア)126、第2入力電圧を受け取る第2DOTA128、第1及び第2DOTA間に接続された第1抵抗素子122、反転入力において第2DOTA128に接続された増幅器130、及び、第2DOTA128と反転入力を増幅器130の出力に接続する第2抵抗素子R2を含む。抵抗素子の少なくとも1つは可変抵抗素子である。【選択図】図5−1

Abstract translation: 要解决的问题：提供可变增益电流输送机的仪表放大器，而不会导致传输门失真。解决方案：可变增益仪表放大器120包括第一双输出跨导放大器（即，当前传输器）126 用于接收第一输入电压的第二DOTA 128，用于接收第二输入电压的第二DOTA 128，连接在第一和第二DOTAs之间的第一电阻元件122，在反相输入端与第二DOTA 128连接的放大器130，以及第二电阻元件 R2用于将第二DOTA 128和反相输入与放大器130的输出连接。至少一个电阻元件是可变电阻元件。

公开(公告)号：JP2014023149A

公开(公告)日：2014-02-03

申请号：JP2013141506

申请日：2013-07-05

Applicant: Honeywell Internatl Inc ,  ハネウェル・インターナショナル・インコーポレーテッド

Inventor： WERKING PAUL M

IPC: H03F3/45 ,  H03F3/34 ,  H03F3/68

CPC classification number: H03F3/45 ,  H03F3/45183 ,  H03F3/45475 ,  H03F2203/45644 ,  H03F2203/45676 ,  H03F2203/45711

Abstract: PROBLEM TO BE SOLVED: To provide devices and integrated circuits for instrumentation amplifiers.SOLUTION: In one example, an instrumentation amplifier device uses two non-inverted outputs of a first multiple-output transconductance amplifier, and a non-inverted output and an inverted output of a second multiple-output transconductance amplifier. Both multiple-output transconductance amplifiers have a non-inverted output connected to an inverting input, and a non-inverting input connected to a corresponding input voltage terminal. A first resistor is connected between the inverting inputs of both multiple-output transconductance amplifiers. The outputs of both multiple-output transconductance amplifiers are connected together, connected through a second resistor to ground, and connected to an output voltage terminal. In other examples, two pairs of outputs from triple-output transconductance amplifiers are connected to provide two voltage output terminals, and may also be connected to buffers or a differential amplifier. These provide various advantages over traditional instrumentation amplifiers.

Abstract translation: 要解决的问题：提供仪表放大器的器件和集成电路。解决方案：在一个示例中，仪表放大器器件使用第一多输出跨导放大器的两个非反相输出，以及非反相输出和反相输出 的第二多输出跨导放大器。 多输出跨导放大器都具有连接到反相输入端的非反相输出端和连接到相应输入电压端子的非反相输入端。 第一个电阻连接在多输出跨导放大器的反相输入端之间。 多输出跨导放大器的输出连接在一起，通过第二个电阻连接到地，并连接到输出电压端。 在其他示例中，来自三输出跨导放大器的两对输出被连接以提供两个电压输出端子，并且还可以连接到缓冲器或差分放大器。 与传统的仪表放大器相比，它们具有多种优点。

公开(公告)号：JP2013076706A

公开(公告)日：2013-04-25

申请号：JP2012269094

申请日：2012-12-10

Applicant: Honeywell Internatl Inc ,  ハネウェル・インターナショナル・インコーポレーテッド

Inventor： WERKING PAUL M

IPC: G01P15/13

CPC classification number: H03K5/24 ,  G01P15/125 ,  G01P15/131 ,  G01P2015/0831

Abstract: PROBLEM TO BE SOLVED: To provide a torque driver including a regulator circuit for mitigating zero-g discontinuity effects and deadbanding.SOLUTION: A regulator circuit mitigates zero-g discontinuity effects and deadbanding by preventing a torque signal from producing torque signals that simultaneously track a control signal. To do this, the regulator circuit may include a rectifying buffer and/or a modulator. A torque driver comprises: a left rectifying buffer 88 for outputting a left torque signal, the left rectifying buffer comprising a differential input 100, 104 coupled to receive the left torque signal and the control signal; and a right rectifying buffer 86 for outputting a right torque signal, the right rectifying buffer comprising a differential input 92, 96 coupled to receive the right torque signal and the control signal. The left torque signal correlatively corresponds to voltage difference between the left torque signal and the control signal, and the right torque signal correlatively corresponds to voltage difference between the right torque signal and the control signal.

Abstract translation: 要解决的问题：提供一种扭矩驱动器，其包括用于减轻零g不连续效应和死区的调节器电路。

解决方案：调节器电路通过防止转矩信号产生同时跟踪控制信号的转矩信号来减轻零g不连续效应和死区。 为此，调节器电路可以包括整流缓冲器和/或调制器。 扭矩驱动器包括：左整流缓冲器88，用于输出左转矩信号，左整流缓冲器包括耦合以接收左转矩信号和控制信号的差分输入端100,104; 以及用于输出右转矩信号的右整流缓冲器86，右整流缓冲器包括耦合以接收右转矩信号和控制信号的差分输入端92,96。 左转矩信号相应地对应于左转矩信号和控制信号之间的电压差，右转矩信号相应地对应于右转矩信号和控制信号之间的电压差。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2010220195A

公开(公告)日：2010-09-30

申请号：JP2010006020

申请日：2010-01-14

Applicant: Honeywell Internatl Inc ,  ハネウェル・インターナショナル・インコーポレーテッド

Inventor： WERKING PAUL M

IPC: H03F3/45 ,  H03F3/343

CPC classification number: H03F3/45 ,  H03F3/45928

Abstract: PROBLEM TO BE SOLVED: To provide an electric current amplifier of high common mode rejection ratio (CMRR), having little need for area on an integrated circuit, and with few necessary resistors and alignments and low noise, and having low distortions.
SOLUTION: A current conveyor 8 has a y input 10 and an x input 12 to input substantially equal voltage and a z output 14. The input voltage V
2 is impressed on the x input 12 via a buffer 22 and a resistor 16; the input voltage V
1 is also impressed on the y input 10 via a buffer 20; and the current in the x input 12 is related to the current of the z output 14 by the electric current gain. The differential gain A
DM can be represented by the relation: A
DM =V
out /(V
1 -V
2 )=R
2 /R
1 .
COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供高共模抑制比（CMRR）的电流放大器，几乎不需要集成电路上的面积，并且具有少量必需的电阻器和排列以及低噪声，并且具有低失真。

解决方案：当前输送机8具有输入端10和输入端12，以输入大致相等的电压和氮输出14.输入电压V SB 2通过缓冲器施加在x输入端12上 22和电阻器16; 输入电压V SB 1也通过缓冲器20施加在y输入端10上; 并且x输入端12中的电流与电流增益的z输出14的电流相关。 差分增益A DM 可以用以下关系表示：A DM = V /（V V 2 ）= R 2 / R 1 。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2007129724A

公开(公告)日：2007-05-24

申请号：JP2006300714

申请日：2006-11-06

Applicant: Honeywell Internatl Inc ,  ハネウェル・インターナショナル・インコーポレーテッド

Inventor： WERKING PAUL M

IPC: H03K19/00 ,  H01L21/822 ,  H01L27/04 ,  H03K19/08

CPC classification number: G05F3/267 ,  Y10S323/907

Abstract: PROBLEM TO BE SOLVED: To provide a temperature compensated low voltage reference circuit with a reduced operating voltage overhead. SOLUTION: This is accomplished in several ways including minimizing drain voltage variation at the drains of two inter-connected transistors and implementing a current conveyer in order to adjust the temperature coefficient of an output current or voltage. In one embodiment, a voltage reference circuit employs voltage regulating circuitry to reduce voltage differences caused by short channel effects. The reduction of these voltage differences allows for a lower overhead voltage. In a second embodiment, these voltage differences are reduced by regulating circuit nodes within the voltage reference circuit with a bipolar junction transistor (BJT) which have more ideal characteristics. In these two embodiments, the voltage reference circuit may be a band gap reference circuit or a sub-band gap reference circuit. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供具有降低的工作电压开销的温度补偿低电压参考电路。 解决方案：这通过多种方式实现，包括最小化两个互连晶体管的漏极处的漏极电压变化，并实现电流输送器，以便调节输出电流或电压的温度系数。 在一个实施例中，电压参考电路采用电压调节电路来减少由短通道效应引起的电压差。 这些电压差的减小允许较低的架空电压。 在第二实施例中，通过用具有更理想特性的双极结型晶体管（BJT）调节电压参考电路内的电路节点来降低这些电压差。 在这两个实施例中，电压参考电路可以是带隙基准电路或子带隙基准电路。 版权所有（C）2007，JPO＆INPIT