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68 条记录 (耗时 0.057 秒)

    Signal output circuit
    1.
    发明专利
    Signal output circuit 有权

    公开(公告)号：JP5351215B2

    公开(公告)日：2013-11-27

    申请号：JP2011135973

    申请日：2011-06-20

    申请人： 日本電信電話株式会社 ,  Nttエレクトロニクス株式会社

    发明人： 公一 佐野 ,  裕之 福山 ,  秀之 野坂 ,  誠 中村 ,  浩一 村田 ,  正俊 十林 ,  英祐 土屋

    IPC分类号： H03K19/0175 ,  H03K19/082

    CPC分类号： H03K19/017545

    摘要： In a signal output circuit, an input buffer externally receives a single-phase switching instruction signal for instructing to switch a state of the output circuit to one of a shutdown disable state and a shutdown enable state, and converts and outputs the single-phase switching instruction signal into a differential switching instruction signal formed from two signals having phases opposite to each other. A generation control circuit outputs a generation control signal for controlling generation of a control voltage in the control voltage generation circuit based on the differential switching instruction signal. A control voltage generation circuit outputs the control voltage upon changing a value of the control voltage in accordance with a logic of the single-phase switching instruction signal based on the generation control signal. An output circuit externally receives a differential input signal, outputs a differential output signal upon impedance-converting the differential input signal, and switches between the shutdown disable state and the shutdown enable state of the differential input signal based on the control voltage.

    Differential transimpedance amplifier
    2.
    发明专利
    Differential transimpedance amplifier 有权

    公开(公告)号：JP5302356B2

    公开(公告)日：2013-10-02

    申请号：JP2011137145

    申请日：2011-06-21

    申请人： 日本電信電話株式会社 ,  Nttエレクトロニクス株式会社

    发明人： 公一 佐野 ,  裕之 福山 ,  秀之 野坂 ,  誠 中村 ,  浩一 村田 ,  正俊 十林

    IPC分类号： H03F3/45

    摘要： PROBLEM TO BE SOLVED: To increase a resistance to a common mode input current component. SOLUTION: In a differential transimpedance amplifier, a controlling amplifier 13 generates a control signal depending on a differential voltage between a common mode input voltage that is a combination of signals at respective input terminals IT, IC acquired in an input signal combination circuit 12 and a reference voltage that is a combination of signals at respective output terminals OT, OC acquired in an output signal combination circuit 15, and variable current sources IS1, IS2 draw an amount of current depending on the control signal from input current signals. The input signal combination circuit 12 comprises resistances R31-R33 and a capacitance C31. The output signal combination circuit 15 comprises resistances R41-R43 and a capacitance C41. COPYRIGHT: (C)2013,JPO&INPIT

    Automatic gain control circuit
    6.
    发明专利
    Automatic gain control circuit 有权

    公开(公告)号：JP5336554B2

    公开(公告)日：2013-11-06

    申请号：JP2011137143

    申请日：2011-06-21

    申请人： 日本電信電話株式会社 ,  Nttエレクトロニクス株式会社

    发明人： 公一 佐野 ,  裕之 福山 ,  秀之 野坂 ,  誠 中村 ,  浩一 村田 ,  正俊 十林 ,  泰宣 井鍋 ,  英祐 土屋

    IPC分类号： H03G3/30 ,  H03F1/30 ,  H03F3/34 ,  H03G3/20

    CPC分类号： H03G1/0023

    摘要： In an automatic gain control circuit, a peak detection circuit detects and outputs the peak voltage of an output signal from a variable gain circuit. An average value detection/output amplitude setting circuit detects the average value voltage of an output signal from the variable gain circuit, and outputs a voltage obtained by adding a voltage with an amplitude 1/2 a desired output amplitude of the variable gain circuit to the average value voltage. An amplification circuit controls the gain of the variable gain circuit by amplifying the difference between the output voltages of the peak detection circuit and average value detection/output amplitude setting circuit and outputting a gain control signal to the variable gain circuit. The number of base-emitter junctions of transistors on a path in the peak detection circuit from input ports which receive output signals from the variable gain circuit to an output port which outputs a voltage to the amplification circuit is equal to the number of base-emitter junctions of transistors on a path in the average value detection/output amplitude setting circuit from input ports which receive output signals from the variable gain circuit to an output port which outputs a voltage to the amplification circuit.