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公开(公告)号:JPWO2010016531A1
公开(公告)日:2012-01-26
申请号:JP2010523882
申请日:2009-08-05
Applicant: セイコーインスツル株式会社 , 株式会社Otsl , 株式会社Otsl
Inventor: 芳正 木村 , 芳正 木村 , 鈴木 文雄 , 文雄 鈴木 , 宏一 守屋 , 宏一 守屋 , 祥二 波多野 , 祥二 波多野 , 紀敏 日野 , 紀敏 日野 , 雅仁 種田 , 雅仁 種田
CPC classification number: H04B7/2656 , G06F1/3278 , H04W8/26 , H04W52/0216 , Y02D10/157 , Y02D70/00 , Y02D70/449
Abstract: 配信データ有無情報生成部は、フレームにデータが含まれているか否かを示す配信データ有無情報を生成する。同期信号生成部は、配信データ有無情報を含んだ同期情報を生成する。
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公开(公告)号:JP5663678B2
公开(公告)日:2015-02-04
申请号:JP2014006956
申请日:2014-01-17
Inventor: 芳正 木村 , 芳正 木村 , 鈴木 文雄 , 文雄 鈴木 , 宏一 守屋 , 宏一 守屋 , 祥二 波多野 , 祥二 波多野 , 紀敏 日野 , 紀敏 日野 , 雅仁 種田 , 雅仁 種田
CPC classification number: H04B7/2656 , G06F1/3278 , H04W8/26 , H04W52/0216 , Y02D10/157 , Y02D70/00 , Y02D70/449
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公开(公告)号:JP4728373B2
公开(公告)日:2011-07-20
申请号:JP2008202257
申请日:2008-08-05
Applicant: セイコーインスツル株式会社 , 株式会社Otsl
CPC classification number: H04W56/00 , H04L7/10 , H04W52/0229 , Y02D70/00
Abstract: Provided are a radio communication system, a receiver, and a transmitter, which are capable of reducing an operation time period of a reception circuit of the receiver and achieving reduction in power consumption even if there is a clock error between the transmitter and the receiver. In a case of a conventional method illustrated in FIG. 1(A) , the receiver is operated earlier by a time period (Tm), to thereby achieve synchronization before the clock error of the receiver exceeds the time period (Tm). This requires an extended reception time period for achieving clock synchronization, which therefore prevents the receiver from reducing its power consumption. In view of this, according to the present invention, as illustrated in FIG. 1(B) , a synchronization signal is continuously transmitted from the transmitter a plurality of times in a short period of time, and the receiver receives only one of the continuously-transmitted synchronization signals. With this, the receiver can achieve synchronization of a reference clock by starting a reception operation earlier only by a time period (Tm') (Tm'‰¤Tm).
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