Product detecting circuit for quadrature fm demodulation circuit
    2.
    发明专利
    Product detecting circuit for quadrature fm demodulation circuit 失效
    产品检测电路,用于正交调频解调电路

    公开(公告)号:JPS59171203A

    公开(公告)日:1984-09-27

    申请号:JP4410883

    申请日:1983-03-18

    申请人: Hitachi Ltd

    发明人: IKOMA JIYUNICHI

    CPC分类号: H03D3/00

    摘要: PURPOSE:To detect dropout with simple constitution without using an expensive PLL by detecting it as dropout when an unnecessary high frequency component of a signal passing through a carrier interrupting LPF from a demoduated output reaches a prescribed level or over. CONSTITUTION:An FM signal from an input terminal 1 is amplified by a limiter 2 into a rectangular wave. The center frequency of the rectangular wave is shifted by 90 deg. at a phase shifter 3 and the result is multiplied with a signal not shifted. A signal including a frequency spectrum twice of that of a carrier is outputted in addition to a demodulated signal by this multiplication and the double amplitude wave is eliminated by an LPF5. Further, an output of the LPF5 is applied to an LPF consisting of a resistor 6 and a capacitor 7 so as to detect the reduction in the spectrum more than the required frequency's share. When the unnecessary high frequency component reaches a prescribed level or over, it is regarded as dropout so as to activate transistors TRs 8, 11 and to turn on a switch 15, thereby detecting dropout with simple constitution.

    摘要翻译: 目的:通过在通过从解调输出中断LPF的信号的信号的不必要的高频分量到达规定的水平或以上时,通过将其检测为缺陷来检测出昂贵的PLL来检测丢包。 构成:来自输入端子1的FM信号被限幅器2放大成矩形波。 矩形波的中心频率偏移90度。 在移相器3处,并且将结果乘以未移位的信号。 除了通过该乘法的解调信号之外,还输出包括载波频谱两倍的频谱的信号,并且通过LPF5消除双幅度波。 此外,LPF5的输出被施加到由电阻器6和电容器7组成的LPF,以便检测频谱的减少超过所需频率的份额。 当不必要的高频分量达到规定的电平或以上时,将其视为出错,以激活晶体管TR8,81,并接通开关15,从而以简单的结构检测出退路。

    Fm signal demodulation circuit
    3.
    发明专利
    Fm signal demodulation circuit 失效
    FM信号解调电路

    公开(公告)号:JPS59147504A

    公开(公告)日:1984-08-23

    申请号:JP2118283

    申请日:1983-02-10

    申请人: Sony Corp

    发明人: HIRAI JIYUN

    IPC分类号: H03D3/00

    CPC分类号: H03D3/00

    摘要: PURPOSE:To attain excellent demodulation by a simple circuit even if an FM signal level is decreased by detecting the FM modulating level and demodulating the FM signal while limiting the band of the FM signal depending on the detected output. CONSTITUTION:An FM luminance signal from a reproducing head 1 is extracted by a reproducing amplifier 2 and this FM luminance signal is applied to a voltage controlled type variable band-pass filter 3. The FM luminance signal from the amplifier 2 is applied to an envelope detector 4, the level of the FM luminance signal is detected and the signal is applied to a control terminal of the filter 3. The pass band of the filter 3 is changed depending on this control signal, and when the output level of the FM luminance signal is larger, the band width is widened and when the output level is smaller, the band width is narrowered. The output of the filter 3 is amplitude-limited by a limiter 5 and demodulated by an FM demodulator 6, alllowing to demodulate the signal in excellent way without waveform distortion even if the FM signal level is decreased.

    摘要翻译: 目的:即使通过检测FM调制电平并解调FM信号来降低FM信号电平,通过简单的电路实现优异的解调,同时根据检测到的输出限制FM信号的频带。 构成:来自再现头1的FM亮度信号由再现放大器2提取,并且该FM亮度信号被施加到电压控制型可变带通滤波器3.来自放大器2的FM亮度信号被施加到信封 检测器4检测FM亮度信号的电平,并且将信号施加到滤波器3的控制端。滤波器3的通带根据该控制信号而改变,并且当FM亮度的输出电平 信号较大,带宽变宽,当输出电平较小时,带宽变窄。 滤波器3的输出受到限制器5的限幅,并由FM解调器6进行解调,即使FM信号电平降低,全部解调信号也没有波形失真。

    Fm wave-detection circuit
    5.
    发明专利
    Fm wave-detection circuit 失效
    空值

    公开(公告)号:JPS5754406A

    公开(公告)日:1982-03-31

    申请号:JP12945380

    申请日:1980-09-18

    申请人: Toshiba Corp

    IPC分类号: H03D3/26 H03D3/00

    CPC分类号: H03D3/00

    摘要: PURPOSE:To obtain a small sized FM wae-detection circuit requiring no adjustment, by connecting an AM wave-direction circuit to the poststage of a CCD filter and determining the center frequency of FM detection through the selection of a delay time by clock frequency of CCD and number of bits. CONSTITUTION:A part of an input signal 11 is given to a coefficient circuit 13, and a part of other parts is given to a coefficient circuit 15 via a CCD 12, other parts are given to a coefficient circuit 16 via a CCD 14 and the output of the coefficient circuits is summed 17. The coefficients K1, K3 of the circuits 13, 16 are both at ''x1'', and a coefficient K2 of the circuit 15 is at ''x2''. The CCD is driven with clocks having a specified number of bits N and frequency fk and has delay time T=N/ fk. With the constitution, an FM signal in angular velocity omega of carrier is inputted, and when the frequency changes by + or -DELTAomega to the center frequency, the transfer function of the circuit is about 2(1+ or -DELTAomega) to obtain an AM signal 18 proportional to the DELTAomega. When this output 18 is AM-detected 2, an FM detection signal to the FM input is obtained, no adjustment is required, no variance due to the change in the center frequency and the size can be made small.

    摘要翻译: 目的:为了获得不需要调整的小尺寸FM水平检测电路,通过将AM波导电路连接到CCD滤波器的后级,并通过选择延迟时间来确定FM检测的中心频率,时钟频率为 CCD和位数。 构成:输入信号11的一部分被提供给系数电路13,并且其他部分的一部分经由CCD 12被提供给系数电路15,其他部分经由CCD 14被提供给系数电路16,并且 系数电路的输出相加17.电路13,16的系数K1,K3均为“x1”,电路15的系数K2为“x2”。 CCD由具有指定位数N和频率fk的时钟驱动,具有延迟时间T = N / fk。 通过该结构,输入载波的角速度ω的FM信号,当频率以+或-DELTAomega改变为中心频率时,电路的传递函数为约2(1+或-DELTAomega),以获得 AM信号18与DELTAomega成比例。 当该输出18被AM检测到2时,获得到FM输入的FM检测信号,不需要调整,不会由于中心频率的变化而导致的变化和尺寸变小。

    Fm wave detector
    6.
    发明专利
    Fm wave detector 失效
    FM波检测器

    公开(公告)号:JPS5737907A

    公开(公告)日:1982-03-02

    申请号:JP11207580

    申请日:1980-08-14

    申请人: Toshiba Corp

    发明人: KUSAKABE HIROMI

    IPC分类号: H03D3/00

    CPC分类号: H03D3/00

    摘要: PURPOSE: To obtain an effective output of wave detection without having no saturation of a wave detector, by comparing the DC component extracted out of the output signal of wave detection with the reference voltage and then giving the negative feedback to the output of comparison in order to negate the DC offset.
    CONSTITUTION: The output of an FM wave detector 11 that supplies an intermediate frequency signal IF is applied to an input of an adder 12, and the output terminal of the adder 12 is connected to an output terminal 13 to be also earthed via a by-pass capacitor 14 of an FM carrier. Furthermore an end of a resistance 15 is connected to the output terminal of the adder 12, and the other end of the resistance 15 is earthed via a capacitor 16 and also connected to the negative input terminal. Thus a low-pass filter 18 is formed with the resistance 15 and the capacitor 16, and a reference voltage source 19 with its positive input terminal side set as a positive polarity is connected between the positive input terminal and the earth. In such constitution, the negative feedback is carried out via the amplifier 17 if the DC component of the output potential of the detector 11 is different from the reference voltage. Thus a coincidence is secured between the output potential and the reference voltage.
    COPYRIGHT: (C)1982,JPO&Japio

    摘要翻译: 目的:通过将波检测输出信号中提取的直流分量与参考电压进行比较,然后将负反馈按比例的输出进行比较,以获得无波浪检测器饱和的波检测的有效输出 以否定DC偏移。 构成:提供中频信号IF的FM波检测器11的输出被施加到加法器12的输入,加法器12的输出端连接到输出端13, 通过FM载波的电容器14。 此外,电阻15的一端连接到加法器12的输出端,电阻15的另一端通过电容器16接地,并连接到负输入端。 因此,形成有电阻15和电容器16的低通滤波器18,将正输入端侧设定为正极的参考电压源19连接在正输入端和地之间。 在这种结构中,如果检测器11的输出电位的DC分量与参考电压不同,则通过放大器17进行负反馈。 因此,确保输出电位和参考电压之间的一致性。

    Frequency multiplication transceiver

    公开(公告)号:JP2013523056A

    公开(公告)日:2013-06-13

    申请号:JP2013501435

    申请日:2011-03-23

    IPC分类号: H03K5/00 H03K3/03

    摘要: ワイヤレス通信の超低電力の送受信を可能にするワイヤレス・トランシーバ、および関連する方法が開示される。 このワイヤレス・トランシーバの例示的な実施形態において、ワイヤレス・トランシーバが、第1の基準周波数を有する第1の基準信号を受信する。 次に、ワイヤレス・トランシーバは、第1の基準信号を使用して局部発振器を注入ロックし、局部発振器は、第1の基準周波数と等しい発振周波数をそれぞれが有し、さらに等間隔の位相をそれぞれが有する発振信号のセットを供給する。 次に、ワイヤレス・トランシーバは、このセットの発振信号を合成して、(i)第1の基準周波数の倍数(送信機実装形態による)、または(ii)(a)第2の基準信号の第2の基準周波数と(b)第1の基準周波数の倍数との差(受信機実装形態による)のいずれかである出力周波数を有する出力信号を生成する。

    Fm demodulation circuit
    10.
    发明专利
    Fm demodulation circuit 失效
    FM解调电路

    公开(公告)号:JPS59193609A

    公开(公告)日:1984-11-02

    申请号:JP6695483

    申请日:1983-04-18

    申请人: Hitachi Ltd

    摘要: PURPOSE: To attain power saving and also to improve the immunity to power noise by constituting the circuit with one stage of transistors (TR) stacked vertically.
    CONSTITUTION: A signal is inputted to an inverter 2, an signal being the inversion of the former signal is inputted to an inverter 13, and a capacitor 17 is connected between outputs or between each output and ground. Then, the output of the inverters 12, 13 is inputted respectively to inverters 14, 15 and the outputs are ANDed by a means 16. Since the inverter 12 consists of an integrated injection logic I
    2 L comprising a TR12a and an injector current 12i, only one stage is used for the number of TRs stacked vertically, then the low voltage operation is attained and power saving is attained.
    COPYRIGHT: (C)1984,JPO&Japio

    摘要翻译: 目的:通过构成垂直堆叠的一级晶体管(TR)的电路来实现功率节省并且还提高对功率噪声的抗扰性。 构成:将信号输入到逆变器2,将前一信号反转的信号输入到逆变器13,电容器17连接在输出之间或每个输出与地之间。 然后,反相器12,13的输出分别输入到反相器14,15,并且输出与装置16进行“与”运算。由于反相器12由包括TR12a的集成注入逻辑I 2和喷射器电流 如图12i所示,仅垂直堆叠的TR的数量仅使用一个级,从而实现低电压操作并节省功率。