公开(公告)号：US4392123A

公开(公告)日：1983-07-05

申请号：US265114

申请日：1981-05-19

申请人： Harro Bruggemann

发明人： Harro Bruggemann

IPC分类号： H04N5/21 ,  H03K13/02

CPC分类号： H04N5/21

摘要： A signal-to-noise improving system is described which comprises a circuit input for incoming noisy analogue signals and a circuit output for digitally stored input signals which have an improved signal-to-noise ratio provided by the system and which have been reconverted to analogue form,said circuit input and said circuit output being connected to inputs of an analogue comparator arranged to give an output which signifies that the stored signal is either higher or lower in magnitude than the incoming signal or that the incoming signal is either higher or lower in magnitude than the stored signal,said comparator output being connected to a signal incrementor which is arranged to give a signal output which is the stored digital signal incremented higher or lower by a number digitally in response to either a higher or lower signal output from said comparator,a store for storing in digital from the so incremented input signals, the store output being connected to a digital to analogue converter 1 the output of which is connected to said circuit output,said comparator, said incrementor, said store and said digital to analogue converter 1 being operative cyclically to compare the incoming noisy signals with the stored analogue output signals and to up date the stored signals to new stored signals determined by adding or subtracting a number digitally from the stored signals in accordance with whether said comparator, comparing the analogue input and output signals gives a higher or lower output whereby to eventually store signals representative of the incoming signals with enhanced signal-to-noise ratio so that said circuit output can provide an output signal of those enhanced stored signals.Preferably there is provided an incrementor controller, for controlling the incrementation of said incrementor, and wherein, in use, said incrementor initially, increments in a series of increments which are similar to those of a successive approximation analogue to digital converter whereby to provide for rapid convergence to a signal value near the mean value of the analogue input signal.

公开(公告)号：US3629567A

公开(公告)日：1971-12-21

申请号：US3629567D

申请日：1969-09-05

申请人： POSTMASTER GENERALS DEPARTMENT ,  HARRO BRUGGEMANN ,  COMMW OF AUSTRALIA

发明人： BRUGGEMANN HARRO ,  THE COMMONWEALTH OF AUSTRALIA

IPC分类号： G06G7/16

CPC分类号： G06G7/16

摘要： An analogue multiplier stage which in use receives a first input signal represented by a pair of input currents and comprises a pair of current forks which divide the input currents in a predetermined ratio, the outputs the forks being cross-connected in one configuration to produce an output signal represented by a pair of output currents from the stage and representative of a product of the input signal and a term involving the ratio, and the fork outputs being cross-connected in the alternative configuration to produce a feedback signal which can be used to control the ratio by comparison with a second input signal.