Sigma-delta modulator with shared operational amplifier and associated method
    1.
    发明授权
    Sigma-delta modulator with shared operational amplifier and associated method 有权
    具有共享运算放大器和相关方法的Σ-Δ调制器

    公开(公告)号:US08217815B2

    公开(公告)日:2012-07-10

    申请号:US12861970

    申请日:2010-08-24

    IPC分类号: H03M3/00

    CPC分类号: H03M3/474 H03M3/456

    摘要: A Sigma-Delta modulator with a shared operational amplifier (op-amp) includes an integrated circuit, having two integrators sharing the op-amp, capable of integrating two input signals of the two integrators; a plurality of quantizers, coupled to the integrating circuit, for comparing outputting signals of the integrators with a predetermined signal and then generating digital outputting signals; a plurality of DACs, respectively coupled to the quantizers, for converting the digital outputting signals to analog feedback signals to the integrators; and a clock generator, for providing clock signals to the integrating circuit and the quantizers. Accordingly, layout area and power consumption of the modulator are reduced due to the shared op-amp.

    摘要翻译: 具有共享运算放大器(运算放大器)的Σ-Δ调制器包括集成电路,具有共享运算放大器的两个积分器,能够集成两个积分器的两个输入信号; 多个量化器,耦合到积分电路,用于将积分器的输出信号与预定信号进行比较,然后产生数字输出信号; 分别耦合到量化器的多个DAC,用于将数字输出信号转换为模拟反馈信号到积分器; 以及用于向积分电路和量化器提供时钟信号的时钟发生器。 因此,由于共享运算放大器,调制器的布局面积和功耗降低。

    Sigma-Delta Modulator with Shared Operational Amplifier and Associated Method
    2.
    发明申请
    Sigma-Delta Modulator with Shared Operational Amplifier and Associated Method 有权
    具有共享运算放大器和相关方法的Σ-Δ调制器

    公开(公告)号:US20110063155A1

    公开(公告)日:2011-03-17

    申请号:US12861970

    申请日:2010-08-24

    IPC分类号: H03M3/00

    CPC分类号: H03M3/474 H03M3/456

    摘要: A Sigma-Delta modulator with a shared operational amplifier (op-amp) includes an integrated circuit, having two integrators sharing the op-amp, capable of integrating two input signals of the two integrators; a plurality of quantizers, coupled to the integrating circuit, for comparing outputting signals of the integrators with a predetermined signal and then generating digital outputting signals; a plurality of DACs, respectively coupled to the quantizers, for converting the digital outputting signals to analog feedback signals to the integrators; and a clock generator, for providing clock signals to the integrating circuit and the quantizers. Accordingly, layout area and power consumption of the modulator are reduced due to the shared op-amp.

    摘要翻译: 具有共享运算放大器(运算放大器)的Σ-Δ调制器包括集成电路,具有共享运算放大器的两个积分器,能够集成两个积分器的两个输入信号; 多个量化器,耦合到积分电路,用于将积分器的输出信号与预定信号进行比较,然后产生数字输出信号; 分别耦合到量化器的多个DAC,用于将数字输出信号转换为模拟反馈信号到积分器; 以及用于向积分电路和量化器提供时钟信号的时钟发生器。 因此,由于共享运算放大器,调制器的布局面积和功耗降低。