公开(公告)号：US07429885B2

公开(公告)日：2008-09-30

申请号：US10556113

申请日：2004-08-07

申请人： Atul Katoch ,  Rinze Ida Mechtildis Peter Meijer ,  Sanjeev Kimar Jain

发明人： Atul Katoch ,  Rinze Ida Mechtildis Peter Meijer ,  Sanjeev Kimar Jain

IPC分类号： H03K5/08 ,  H03L5/00

CPC分类号： H03K19/00346 ,  H03K5/08 ,  H04L25/085

摘要： A clamper circuit for receiving an input signal from a victim wire, the clamper circuit being capable of receiving aggressor signals from aggressor wires, the aggressor wires being the signal wires that can potentially induce crosstalk on the victim wire and an output signal being selectively enabled based on the logic states of the input signal and the aggressor signals, the clamper circuit also being capable of accelerating the switching of the victim wire when an opposite transition occurs on the aggressors and victim wire at the same time, so as to thereby reduce worst case delay and improve the signal integrity.

摘要翻译： 用于从受害线接收输入信号的钳位电路，钳位电路能够接收来自侵扰线的侵扰信号，侵略线是潜在地在受害线上诱发串扰的信号线，以及基于有选择地启用的输出信号 在输入信号和侵略者信号的逻辑状态下，当在侵略者和受害线同时发生相反的转变时，钳位电路还能够加速受害线的切换，从而减少最坏情况 延迟和提高信号完整性。