Test system apparatus with Schottky diodes with programmable voltages
    1.
    发明授权
    Test system apparatus with Schottky diodes with programmable voltages 失效
    具有可编程电压的肖特基二极管的测试系统设备

    公开(公告)号:US5200696A

    公开(公告)日:1993-04-06

    申请号:US756325

    申请日:1991-09-06

    IPC分类号: G01R31/28 G01R31/319

    CPC分类号: G01R31/31924 G01R31/2844

    摘要: An apparatus for a test system for testing an electronic circuit. The apparatus includes an interconnect path, a comparator, a programmable apparatus, a first Schottky diode, and a second Schottky diode. The interconnect path has a first end and a second end. The first end of the interconnect path is coupled to the electronic circuit under test. The interconnect path transmits a signal from the electronic circuit under test to the second end of the interconnect path. The comparator is coupled to the second end of the interconnect path for receiving and comparing the signal from the electronic circuit under test with a reference voltage. The comparator has a high input impedance. The comparator provides an output signal to the test system. The programmable apparatus provides a selectable first voltage and a selectable second voltage. A first Schottky diode is provided for reducing ringing of the signal from the electronic circuit under test. A first end of the first Schottky diode is coupled to the interconnect path at a point near the comparator. A second end of the first Schottky diode is coupled to the selectable first voltage. A second Schottky diode is provided for reducing ringing of the signal from the electronic circuit under test. A first end of the second Schottky diode is coupled to the selectable second voltage. The second end of the second Schottky diode is coupled to the interconnect path at a point near the comparator.

    摘要翻译: 一种用于测试电子电路的测试系统的装置。 该装置包括互连路径,比较器,可编程装置,第一肖特基二极管和第二肖特基二极管。 互连路径具有第一端和第二端。 互连路径的第一端耦合到被测电子电路。 互连路径将来自被测电子电路的信号发送到互连路径的第二端。 比较器耦合到互连路径的第二端,用于接收和比较来自被测电子电路的信号和参考电压。 比较器具有高输入阻抗。 比较器向测试系统提供输出信号。 可编程装置提供可选择的第一电压和可选择的第二电压。 提供第一肖特基二极管用于减少来自被测电子电路的信号振铃。 第一肖特基二极管的第一端在靠近比较器的点处耦合到互连路径。 第一肖特基二极管的第二端耦合到可选择的第一电压。 第二肖特基二极管用于减少来自被测电子电路的信号的振铃。 第二肖特基二极管的第一端耦合到可选择的第二电压。 第二肖特基二极管的第二端在靠近比较器的点处耦合到互连路径。

    High speed I.sub.DDQ monitor circuit
    2.
    发明授权
    High speed I.sub.DDQ monitor circuit 失效
    高速IDDQ监控电路

    公开(公告)号:US5694063A

    公开(公告)日:1997-12-02

    申请号:US721973

    申请日:1996-09-27

    摘要: A process for determining a quiescent power supply current (I.sub.DDQ) of a device under test (DUT) at a first node. The process includes the steps of providing a reference current to the first node and decoupling a power supply from the first node. A first node voltage is determined at a first time after the power supply is decoupled from the first node. The first node voltage is determined at a second time after the first time. If the first node voltage increases from the first time to the second time, it is indicated that the I.sub.DDQ of the DUT is less than the reference current. If the first node voltage decreases from the first time to the second time, it is indicated that the I.sub.DDQ of the DUT is greater than the reference current.

    摘要翻译: 一种用于确定在第一节点处被测设备(DUT)的静态电源电流(IDDQ)的过程。 该过程包括以下步骤:向第一节点提供参考电流并且从第一节点去耦电力供应。 在电源从第一节点解耦之后的第一时间确定第一节点电压。 在第一次之后的第二时间确定第一节点电压。 如果第一节点电压从第一次增加到第二次,则表示DUT的IDDQ小于参考电流。 如果第一节点电压从第一次降低到第二次,则表明DUT的IDDQ大于参考电流。

    High speed I.sub.DDQ monitor circuit
    3.
    发明授权
    High speed I.sub.DDQ monitor circuit 失效
    高速IDDQ监控电路

    公开(公告)号:US5552744A

    公开(公告)日:1996-09-03

    申请号:US472070

    申请日:1995-06-05

    摘要: A process for determining a quiescent power supply current (I.sub.DDQ) of a device under test (DUT) at a first node. The process includes the steps of providing a reference current to the first node and decoupling a power supply from the first node. A first node voltage is determined at a first time after the power supply is decoupled from the first node. The first node voltage is determined at a second time after the first time. If the first node voltage increases from the first time to the second time, it is indicated that the I.sub.DDQ of the DUT is less than the reference current. If the first node voltage decreases from the first time to the second time, it is indicated that the I.sub.DDQ of the DUT is greater than the reference current.

    摘要翻译: 一种用于确定在第一节点处被测设备(DUT)的静态电源电流(IDDQ)的过程。 该过程包括以下步骤:向第一节点提供参考电流并且从第一节点去耦电力供应。 在电源从第一节点解耦之后的第一时间确定第一节点电压。 在第一次之后的第二时间确定第一节点电压。 如果第一节点电压从第一次增加到第二次,则表示DUT的IDDQ小于参考电流。 如果第一节点电压从第一次降低到第二次,则表明DUT的IDDQ大于参考电流。