公开(公告)号：US20240361386A1

公开(公告)日：2024-10-31

申请号：US18734706

申请日：2024-06-05

申请人： CELERINT, LLC

发明人： Howard H. ROBERTS, JR. ,  LeRoy GROWT ,  Thomas SCHOEN

IPC分类号： G01R31/319 ,  G01R31/3183

CPC分类号： G01R31/31924 ,  G01R31/31835 ,  G01R31/31905 ,  G01R31/31926

摘要： A method is provided for determining a decoupling capacitance of a device under test (DUT) interface circuitry, which is between automated testing equipment (ATE) and a DUT. The method: disconnects the DUT from the DUT interface circuitry; connects a Device Under Testing Power Supply (DPS) resource as a DUT Power Supply to the DUT interface circuitry; sets a current clamp of the DPS resource to a test application level; turns off the DPS resource voltage; sets the DPS resource to a force voltage mode; sets the current clamp to a minimum current level; turns on the output; waits a period of time to allow the decoupling capacitance to charge; places the DPS resource into a voltage measurement mode; adds any delay time to the period of time; measures the voltage before the capacitance is fully charged; and determines the decoupling capacitance.

公开(公告)号：US12032022B2

公开(公告)日：2024-07-09

申请号：US17447428

申请日：2021-09-12

申请人： CHANGXIN MEMORY TECHNOLOGIES, INC.

发明人： Xinwang Chen ,  Maosong Ma ,  Zhangqin Zhou

IPC分类号： G01R31/3185 ,  G01R19/25 ,  G01R31/319 ,  G01R31/3193

CPC分类号： G01R31/318575 ,  G01R19/2503 ,  G01R31/318597 ,  G01R31/31924 ,  G01R31/31932

摘要： A power consumption measurement assembly includes: at least two sampling modules respectively connected to a circuit to be measured in series; a gating module configured to gate one of the at least two sampling modules; an amplifying module configured to acquire and amplify a voltage signal across the gated sampling module; and a processing module connected to the gating module and the amplifying module and configured to: control and adjust the gated sampling module and an amplification of the amplifying module, calculate a power consumption value based on the amplified voltage signal and transmit the power consumption value.

公开(公告)号：US11946969B2

公开(公告)日：2024-04-02

申请号：US17880507

申请日：2022-08-03

申请人： Apple Inc.

发明人： Charles J. Fleckenstein ,  Tal Lazmi ,  Ori Isachar

IPC分类号： G01R31/28 ,  G01R31/317 ,  G01R31/3183 ,  G01R31/319

CPC分类号： G01R31/31705 ,  G01R31/31725 ,  G01R31/31727 ,  G01R31/318314 ,  G01R31/31924

摘要： Systems, apparatuses, and methods for implementing a multi-die clock stop trigger are described. A computing system includes a plurality of semiconductor dies connected together and sharing a global clock stop trigger signal which is pulled high via a resistor tied to a supply voltage. Each semiconductor die has a clock generation unit which generates local clocks for the die. Each clock generation unit monitors for local clock stop triggers, and if one of the local triggers is detected, the clock generation unit stops local clocks on the die and pulls the global clock stop trigger signal low. When the other clock generation units on the other semiconductor dies detect the global clock stop trigger at the logic low level, these clock generation units also stop their local clocks. Captured data is then retrieved from the computing system for further analysis.

公开(公告)号：US20240036114A1

公开(公告)日：2024-02-01

申请号：US18038638

申请日：2021-12-02

申请人： Analog Devices International Unlimited Company

发明人： David Aherne ,  Barry P Kinsella

IPC分类号： G01R31/319 ,  G01R31/28

CPC分类号： G01R31/31924 ,  G01R31/2879

摘要： A signal driver system can include one or more force amplifiers configured to provide drive signals to an output node, such as a device under test (DUT) node. The system can include a first switch circuit coupled between a first force amplifier and the output node, and the first switch circuit can include multiple parallel instances of switch circuits with respective different resistance characteristics. The system can include a second switch circuit coupled between a second force amplifier and the output node. The system can include a control circuit configured to control the switch circuit instances of the first switch circuit to mitigate glitch at the output node, for example, when switching between the first and second drive signals.

公开(公告)号：US20230349972A1

公开(公告)日：2023-11-02

申请号：US17731589

申请日：2022-04-28

申请人： SanDisk Technologies LLC

发明人： KEYUR PAYAK ,  NAVEEN THOMAS

IPC分类号： G01R31/319 ,  G01R31/317 ,  G01R31/28

CPC分类号： G01R31/31905 ,  G01R31/31924 ,  G01R31/31727 ,  G01R31/2879

摘要： A charge pump test configuration and corresponding method of operation are disclosed for determining charge pump efficiency without needing to obtain direct current measurements. A first number of clock edges (CEs) of a clock signal supplied to a first charge pump is determined over a period of time for a predetermined output current. The first charge pump is then connected with a charge pump under test (PUT) in a cascaded manner such that an output current of the first charge pump is supplied to the PUT as an input current. A second number of CEs of a clock signal supplied to the first charge pump is determined over the same period of time for the same predetermined output current from the PUT. The efficiency of the PUT can then be determined as the ratio of the first number of CEs to the second number of CEs, or vice versa.

公开(公告)号：US11782093B2

公开(公告)日：2023-10-10

申请号：US17123142

申请日：2020-12-16

申请人： AmTRAN Technology Co., Ltd.

发明人： Yen-Ting Tung

IPC分类号： G01R31/319 ,  H04B3/54

CPC分类号： G01R31/31905 ,  G01R31/31924 ,  G01R31/31926 ,  H04B3/542

摘要： The present disclosure relates to a detection system including a control circuit, a power line network bridge circuit, a fixture device and a detection device. The control circuit is configured to generate a plurality of detection signals. The power line network bridge circuit receives detection signals through a power line. The fixture device is electrically connected to the power line through the power line network bridge, and is configured to receive the detection signals. The fixture device is configured to transmit the detection signals to a device under test, so that the device under test displays a plurality of media. The detection device is configured to capture the media and transmit the media to the control circuit. The control circuit is further configured to determine whether the media match with detection parameters.

公开(公告)号：US11762016B2

公开(公告)日：2023-09-19

申请号：US17457972

申请日：2021-12-07

申请人： ANRITSU CORPORATION

发明人： Jesse Paulo Valencia Macabasco ,  Koichiro Tomisaki

IPC分类号： G01R31/3185 ,  G01R31/319 ,  G06F11/27

CPC分类号： G01R31/318505 ,  G01R31/31924 ,  G06F11/27

摘要： A signal generator and a method for controlling the signal generator, capable of suppressing variation in the intensity of signals inputted to multiple devices under test are provided. An attenuation amount setting unit 15 sets a reference attenuation amount, obtained by subtracting the maximum amount of the losses stored in the cable loss storage unit 16 with respect to the cables 4a to 4f connected to the output ports 12a to 12f from a target attenuation amount, to the first attenuator 11, and sets an output attenuation amount, obtained by subtracting the losses stored in the cable loss storage unit 16 with respect to each of the cables 4a to 4f connected to the output ports 12a to 12f, from the maximum amount of the losses, to each of the second attenuators 14a to 14f.

公开(公告)号：US20230251313A1

公开(公告)日：2023-08-10

申请号：US18088792

申请日：2022-12-27

申请人： Chih-Huan FANG

发明人： Chih-Huan FANG

IPC分类号： G01R31/319 ,  G01R19/00

CPC分类号： G01R31/31924 ,  G01R19/0092

摘要： The present invention provides an output voltage compensation method, for a DC voltage source having a constant voltage circuit and a constant current circuit connected in series, and the DC voltage source provides an output voltage to a device under test (DUT), and the output voltage compensation method comprising: generating a voltage compensation value according to a load current and a gain parameter of the DUT; generating a virtual current setting value according to a voltage setting value and the voltage compensation value; generating a duty cycle command according to the virtual current setting value and a load current measurement value of the load current; and generating the output voltage conforming to the voltage setting value according to the duty cycle command. Wherein the gain parameter is related to a multiplier parameter of the constant voltage circuit.

公开(公告)号：US11705894B2

公开(公告)日：2023-07-18

申请号：US17001526

申请日：2020-08-24

申请人： Keithley Instruments, LLC

发明人： Gregory Sobolewski

IPC分类号： G01R31/02 ,  G01R31/26 ,  H03K3/57 ,  G01R31/319 ,  G01R31/28 ,  H01L21/66

CPC分类号： H03K3/57 ,  G01R31/2831 ,  G01R31/2886 ,  G01R31/31924 ,  G01R31/2884 ,  H01L22/34 ,  H01L2924/00 ,  H01L2924/0002

摘要： A test and measurement circuit including a capacitor in parallel with a device under test, a direct current voltage source configured to charge the capacitor, a pulse generator configured to generate a pulse for testing the device under test, and a sensor for determining a current in the device under test.

公开(公告)号：US20180088175A1

公开(公告)日：2018-03-29

申请号：US15680481

申请日：2017-08-18

申请人： BOE Technology Group Co., Ltd. ,  Beijing BOE Optoelectronics Technology Co., Ltd.

发明人： Qin Tan

IPC分类号： G01R31/317 ,  G01R31/3193 ,  G09G5/00 ,  G09G3/00 ,  G01R31/319

CPC分类号： G01R31/31706 ,  G01R31/31924 ,  G01R31/31937 ,  G09G3/006 ,  G09G5/003 ,  G09G5/006 ,  G09G2330/12 ,  G09G2370/14

摘要： Embodiments of the present application disclose a method and a device of detecting a low voltage differential signal output to a liquid crystal display panel. In the method, the low voltage differential signal is decoded into a pixel color data signal; and then blanking signals of the pixel color data signal are counted.