MULTI-DIE SYSTEM PERFORMANCE OPTIMIZATION

    公开(公告)号:US20210405722A1

    公开(公告)日:2021-12-30

    申请号:US17029852

    申请日:2020-09-23

    Abstract: A multi-die semiconductor package includes a first integrated circuit (IC) die having a first intrinsic performance level and a second IC die having a second intrinsic performance level different from the first intrinsic performance level. A power management controller distributes, based on a determined die performance differential between the first IC die and the second IC die, a level of power allocated to the semiconductor chip package between the first IC die and the second IC die. In this manner, the first IC die receives and operates at a first level of power resulting in performance exceeding its intrinsic performance level. The second IC die receives and operates at a second level of power resulting in performance below its intrinsic performance level, thereby reducing performance differentials between the IC dies.

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