公开(公告)号：US08744524B2

公开(公告)日：2014-06-03

申请号：US13864607

申请日：2013-04-17

Applicant: Apple Inc.

Inventor： Stephan Vincent Schell

IPC: G10L21/0208

CPC classification number: G10L21/0208 ,  H04M9/082

Abstract: A multi-function communications device has a processor that generates a user interface audible tone signal. The device also has a downlink digital signal processor, and an uplink digital signal processor. A mixer has an input to receive the downlink signal and another input to receive the user interface tone signal. The uplink processor has an acoustic echo canceller having an input to receive the uplink signal and another input to receive an output from the mixer. The echo canceller may reduce the amount of both the far-end user's speech and the user interface tone that may be present in the uplink signal. The mixer may be positioned within the chain of audio signal processors, or it may be positioned outside the chain. Other embodiments are also described and claimed.

Abstract translation: 多功能通信设备具有产生用户界面可听音信号的处理器。 该设备还具有下行数字信号处理器和上行数字信号处理器。 混频器具有用于接收下行链路信号的输入端和用于接收用户接口音调信号的另一输入端。 上行链路处理器具有声学回声消除器，其具有用于接收上行链路信号的输入端和用于接收来自混频器的输出的另一输入端。 回波消除器可以减少远端用户的语音和可能存在于上行链路信号中的用户接口音的量。 混频器可以位于音频信号处理器链内，或者它可以被定位在链的外部。 还描述和要求保护其他实施例。

公开(公告)号：US20130231158A1

公开(公告)日：2013-09-05

申请号：US13864607

申请日：2013-04-17

Applicant: APPLE INC.

Inventor： Stephan Vincent Schell

IPC: G10L21/0208

CPC classification number: G10L21/0208 ,  H04M9/082

Abstract: A multi-function communications device has a processor that generates a user interface audible tone signal. The device also has a downlink digital signal processor, and an uplink digital signal processor. A mixer has an input to receive the downlink signal and another input to receive the user interface tone signal. The uplink processor has an acoustic echo canceller having an input to receive the uplink signal and another input to receive an output from the mixer. The echo canceller may reduce the amount of both the far-end user's speech and the user interface tone that may be present in the uplink signal. The mixer may be positioned within the chain of audio signal processors, or it may be positioned outside the chain. Other embodiments are also described and claimed.

Abstract translation: 多功能通信设备具有产生用户界面可听音信号的处理器。 该设备还具有下行数字信号处理器和上行数字信号处理器。 混频器具有用于接收下行链路信号的输入端和用于接收用户接口音调信号的另一输入端。 上行链路处理器具有声学回声消除器，其具有用于接收上行链路信号的输入端和用于接收来自混频器的输出的另一输入端。 回波消除器可以减少远端用户的语音和可能存在于上行链路信号中的用户接口音的量。 混频器可以位于音频信号处理器链内，或者它可以被定位在链的外部。 还描述和要求保护其他实施例。

公开(公告)号：US08924768B2

公开(公告)日：2014-12-30

申请号：US13957998

申请日：2013-08-02

Applicant: Apple Inc.

Inventor： Timothy John Millet ,  Binu K. Mathew ,  Stephan Vincent Schell

IPC: G06F1/04 ,  G06F1/32 ,  H04L12/12

CPC classification number: G06F1/324 ,  G06F1/04 ,  G06F1/3203 ,  G06F1/3209 ,  G06F1/3287 ,  H04L12/12 ,  Y02D10/171 ,  Y02D50/20 ,  Y02D50/40

Abstract: Apparatuses and methods are disclosed for implementing an inter-processor communication channel including power-down functionality. In one embodiment, the apparatus may comprise a first integrated circuit (IC), a second IC coupled to the first IC via a communication interface, wherein the first IC is in one or more low power states and unable to monitor the communication interface. The apparatus may further comprise an inter-processor communication (IPC) channel coupled between the first and second ICs, wherein the IPC channel is separate from the communication interface and wherein the second IC generates at least one advisory signal to the first IC via the IPC channel.

Abstract translation: 公开了用于实现包括断电功能的处理器间通信信道的装置和方法。 在一个实施例中，该装置可以包括第一集成电路（IC），经由通信接口耦合到第一IC的第二IC，其中第一IC处于一个或多个低功率状态并且不能监视通信接口。 该装置还可以包括耦合在第一和第二IC之间的处理器间通信（IPC）信道，其中IPC信道与通信接口分离，并且其中第二IC通过IPC生成至少一个建议信号到第一IC 渠道。

公开(公告)号：US20130332759A1

公开(公告)日：2013-12-12

申请号：US13957998

申请日：2013-08-02

Applicant: Apple Inc.

Inventor： Timothy John Millet ,  Binu K. Mathew ,  Stephan Vincent Schell

IPC: G06F1/32 ,  G06F1/04

CPC classification number: G06F1/324 ,  G06F1/04 ,  G06F1/3203 ,  G06F1/3209 ,  G06F1/3287 ,  H04L12/12 ,  Y02D10/171 ,  Y02D50/20 ,  Y02D50/40

Abstract: Apparatuses and methods are disclosed for implementing an inter-processor communication channel including power-down functionality. In one embodiment, the apparatus may comprise a first integrated circuit (IC), a second IC coupled to the first IC via a communication interface, wherein the first IC is in one or more low power states and unable to monitor the communication interface. The apparatus may further comprise an inter-processor communication (IPC) channel coupled between the first and second ICs, wherein the IPC channel is separate from the communication interface and wherein the second IC generates at least one advisory signal to the first IC via the IPC channel.

Abstract translation: 公开了用于实现包括断电功能的处理器间通信信道的装置和方法。 在一个实施例中，该装置可以包括第一集成电路（IC），经由通信接口耦合到第一IC的第二IC，其中第一IC处于一个或多个低功率状态并且不能监视通信接口。 该装置还可以包括耦合在第一和第二IC之间的处理器间通信（IPC）信道，其中IPC信道与通信接口分离，并且其中第二IC通过IPC生成至少一个建议信号到第一IC 渠道。