公开(公告)号：US09152601B2

公开(公告)日：2015-10-06

申请号：US13890828

申请日：2013-05-09

Applicant: Advanced Micro Devices, Inc.

Inventor： Patryk Kaminski ,  Mauricio Breternitz ,  Gary R. Frost ,  Christophe Harle

IPC: G06F15/80 ,  G06F15/17 ,  G06T1/20 ,  G06F9/50

CPC classification number: G06F15/17 ,  G06F9/50 ,  G06F9/5044 ,  G06F9/5066 ,  G06F2209/5017 ,  G06F2209/509 ,  G06T1/20 ,  Y02D10/22 ,  Y02D10/36

Abstract: An approach and a method for efficient execution of nested map-reduce framework workloads to take advantage of the combined execution of central processing units (CPUs) and graphics processing units (GPUs) and lower latency of data access in accelerated processing units (APUs) is described. In embodiments, metrics are generated to determine whether a map or reduce function is more efficiently processed on a CPU or a GPU. A first metric is based on ratio of a number of branch instructions to a number of non-branch instructions, and a second metric is based on the comparison of execution times on each of the CPU and the GPU. Selecting execution of map and reduce functions based on the first and second metrics result in accelerated computations. Some embodiments include scheduling pipelined executions of functions on the CPU and functions on the GPU concurrently to achieve power-efficient nested map reduce framework execution.

Abstract translation: 嵌入式地图缩减框架工作负载以利用中央处理单元（CPU）和图形处理单元（GPU）的组合执行以及加速处理单元（APU）中数据访问的较低延迟的方法和方法是 描述。 在实施例中，生成度量以确定在CPU或GPU上是否更有效地处理地图或缩小功能。 第一度量是基于分支指令的数目与多个非分支指令的比率，第二度量是基于CPU和GPU中的每一个的执行时间的比较。 基于第一和第二指标选择地图的执行和减少功能导致加速计算。 一些实施例包括调度CPU上的功能的流水线执行和GPU上的功能，以实现功率有效的嵌套映射减少框架执行。

公开(公告)号：US20140344489A1

公开(公告)日：2014-11-20

申请号：US13898326

申请日：2013-05-20

Applicant: Advanced Micro Devices, Inc.

Inventor： Patryk Kaminski ,  Thomas R. Woller

IPC: G06F5/08

CPC classification number: G06F5/08 ,  G06F9/3881

Abstract: An interface includes a first hardware register field to store respective chunks of a command directed to a device and respective chunks of a response to the command from the device. The interface also includes a second hardware register field to store a size of the command and a size of the response. The first and second hardware register fields are accessible by the device and by a processor external to the device that generates the command, in response to memory not being available to buffer the command and the response.

Abstract translation: 接口包括第一硬件寄存器字段，用于存储针对设备的命令的各个块以及对来自该设备的命令的响应的相应组块。 接口还包括第二硬件寄存器字段，用于存储命令的大小和响应的大小。 第一和第二硬件寄存器字段可由设备和生成命令的设备外部的处理器访问，以响应不能用于缓冲命令和响应的存储器。

公开(公告)号：US09223542B2

公开(公告)日：2015-12-29

申请号：US13898326

申请日：2013-05-20

Applicant: Advanced Micro Devices, Inc.

Inventor： Patryk Kaminski ,  Thomas R. Woller

IPC: G06F3/00 ,  G06F5/08 ,  G06F13/00

CPC classification number: G06F5/08 ,  G06F9/3881

Abstract: An interface includes a first hardware register field to store respective chunks of a command directed to a device and respective chunks of a response to the command from the device. The interface also includes a second hardware register field to store a size of the command and a size of the response. The first and second hardware register fields are accessible by the device and by a processor external to the device that generates the command, in response to memory not being available to buffer the command and the response.

Abstract translation: 接口包括第一硬件寄存器字段，用于存储针对设备的命令的各个块以及对来自该设备的命令的响应的相应组块。 接口还包括第二硬件寄存器字段，用于存储命令的大小和响应的大小。 第一和第二硬件寄存器字段可由设备和生成命令的设备外部的处理器访问，以响应不能用于缓冲命令和响应的存储器。