Method and apparatus for executing vector instructions with merging behavior

    公开(公告)号:US11573801B1

    公开(公告)日:2023-02-07

    申请号:US17489301

    申请日:2021-09-29

    Abstract: A processor includes a register file and control logic that detects multiple different sets of sequential zero bits of a register in the register file, wherein each of the multiple different sets has a bit length that corresponds to a partial instruction width and operates at a first partial instruction width or a second partial instruction width with the register file depending on number of sets of zero bits detected in the register. In certain examples, the control logic causes operating at first instruction width that avoids merging of a first bit length of data in the register and operating at the second instruction width that avoids merging of a second bit length of data in the register. In some examples, a register rename map table incudes multiple zero bits that identify the detected multiple different sets of bits of sequential zeros.

    SECURE VIRTUALIZED PERFORMANCE MONITORING COUNTERS

    公开(公告)号:US20240220603A1

    公开(公告)日:2024-07-04

    申请号:US18090831

    申请日:2022-12-29

    CPC classification number: G06F21/53 G06F2221/034

    Abstract: A processing system includes a memory configured to store encrypted information representing state and control information for a guest virtual machine. The processing system further includes a processor configured to selectively reserve exclusive use of a set of performance monitoring counters by the guest virtual machine during execution of the guest virtual machine based on a state of a first control field accessed from the encrypted information for the guest virtual machine. The processor further is configured to permit or deny use of the set of performance monitoring counters by the guest virtual machine based on a state of a second control field set by a hypervisor and accessed from the decryption of the encrypted information for the guest virtual machine accessed from the memory.

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