公开(公告)号：US11663001B2

公开(公告)日：2023-05-30

申请号：US16194981

申请日：2018-11-19

Applicant: Advanced Micro Devices, Inc.

Inventor： Sanchari Sen ,  Derrick Allen Aguren ,  Joseph Lee Greathouse

IPC: G06F9/30 ,  G06F9/38 ,  G06F17/16 ,  G06N3/04

CPC classification number: G06F9/30014 ,  G06F9/30036 ,  G06F9/3887 ,  G06F17/16 ,  G06N3/04

Abstract: Systems, apparatuses, and methods for implementing a family of lossy sparse load single instruction, multiple data (SIMD) instructions are disclosed. A lossy sparse load unit (LSLU) loads a plurality of values from one or more input vector operands and determines how many non-zero values are included in one or more input vector operands of a given instruction. If the one or more input vector operands have less than a threshold number of non-zero values, then the LSLU causes an instruction for processing the one or more input vector operands to be skipped. In this case, the processing of the instruction of the one or more input vector operands is deemed to be redundant. If the one or more input vector operands have greater than or equal to the threshold number of non-zero values, then the LSLU causes an instruction for processing the input vector operand(s) to be executed.

公开(公告)号：US20200159529A1

公开(公告)日：2020-05-21

申请号：US16194981

申请日：2018-11-19

Applicant: Advanced Micro Devices, Inc.

Inventor： Sanchari Sen ,  Derrick Allen Aguren ,  Joseph Lee Greathouse

IPC: G06F9/30 ,  G06F17/16 ,  G06F9/38 ,  G06N3/04

Abstract: Systems, apparatuses, and methods for implementing a family of lossy sparse load single instruction, multiple data (SIMD) instructions are disclosed. A lossy sparse load unit (LSLU) loads a plurality of values from one or more input vector operands and determines how many non-zero values are included in one or more input vector operands of a given instruction. If the one or more input vector operands have less than a threshold number of non-zero values, then the LSLU causes an instruction for processing the one or more input vector operands to be skipped. In this case, the processing of the instruction of the one or more input vector operands is deemed to be redundant. If the one or more input vector operands have greater than or equal to the threshold number of non-zero values, then the LSLU causes an instruction for processing the input vector operand(s) to be executed.