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公开(公告)号：US20210157381A1
公开(公告)日：2021-05-27
申请号：US16698525
申请日：2019-11-27
Applicant: Amazon Technologies, Inc.
Inventor： Larisa Goffman-Vinopal , Udi Sherel , Anat Arbely , Yaniv Shapira
Abstract: A method for managing clock frequency in a multi-core integrated circuit includes determining a minimum allowable operating clock frequency and a maximum allowable operating clock frequency for an integrated circuit having a plurality of processor cores. A plurality of clock sources is configured to provide a corresponding plurality of clock frequencies between the minimum allowable operating clock frequency and the maximum allowable operating clock frequency. A total number of active processor cores is determined. If it is determined that all of the plurality the processor cores are active, all active processor cores are operated at the minimum allowable operating clock frequency. If it is determined that the total number of active processor cores is lower than a threshold number, the clock frequency of one or more active processor cores is increased based on available electrical current budget.
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公开(公告)号：US11768630B1
公开(公告)日：2023-09-26
申请号：US17452548
申请日：2021-10-27
Applicant: Amazon Technologies, Inc.
Inventor： Itai Avron , Anat Arbely
CPC classification number: G06F3/0659 , G06F3/0604 , G06F3/0679 , G06F13/1668
Abstract: A memory controller can receive transactions from an interconnect to access the memory. The memory controller can use a credit-based scheme to request the interconnect to send specific memory transactions that can be scheduled in a desirable order using a credit type associated with each transaction. In some embodiments, the memory controller can keep track of the number of transactions directed to each bank of the memory based on a credit type, so that specific transactions directed towards the underutilized banks can be requested and scheduled in a manner to utilize all the banks more uniformly to improve the system performance.
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公开(公告)号：US11106267B2
公开(公告)日：2021-08-31
申请号：US16698525
申请日：2019-11-27
Applicant: Amazon Technologies, Inc.
Inventor： Larisa Goffman-Vinopal , Udi Sherel , Anat Arbely , Yaniv Shapira
Abstract: A method for managing clock frequency in a multi-core integrated circuit includes determining a minimum allowable operating clock frequency and a maximum allowable operating clock frequency for an integrated circuit having a plurality of processor cores. A plurality of clock sources is configured to provide a corresponding plurality of clock frequencies between the minimum allowable operating clock frequency and the maximum allowable operating clock frequency. A total number of active processor cores is determined. If it is determined that all of the plurality the processor cores are active, all active processor cores are operated at the minimum allowable operating clock frequency. If it is determined that the total number of active processor cores is lower than a threshold number, the clock frequency of one or more active processor cores is increased based on available electrical current budget.
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