公开(公告)号：US09182999B2

公开(公告)日：2015-11-10

申请号：US13547701

申请日：2012-07-12

申请人： Andrew William Lueck ,  Krishna Sai Bernucho ,  Alexander J. Branover ,  Paul Edward Kitchin ,  Ronald Perez ,  Sonu Arora

发明人： Andrew William Lueck ,  Krishna Sai Bernucho ,  Alexander J. Branover ,  Paul Edward Kitchin ,  Ronald Perez ,  Sonu Arora

IPC分类号： G06F1/32 ,  G06F9/44

CPC分类号： G06F9/4418 ,  G06F1/32

摘要： Boot configuration information is stored to a volatile memory of a processing system during a low-power state. When resuming from the low-power state, a processor device accesses configuration information for a memory controller from a non-volatile memory and restores the memory controller using the configuration information so as to permit access to the volatile memory. The processor device then configures the initial contexts one or more processor cores using the core state information maintained by the volatile memory during the low-power state and accessed via the configured memory controller, and the one or more processor cores completes the boot process by executing resume boot code maintained by the volatile memory during the low-power state and accessed via the configured memory controller, rather than accessing boot code from a non-volatile memory.

摘要翻译： 引导配置信息在低功耗状态下被存储到处理系统的易失性存储器。 当从低功率状态恢复时，处理器设备从非易失性存储器访问存储器控制器的配置信息，并使用配置信息恢复存储器控制器，以便允许访问易失性存储器。 然后，处理器设备在低功率状态期间使用由易失性存储器维护的核心状态信息来配置初始上下文一个或多个处理器核心，并经配置的存储器控​​制器访问，并且一个或多个处理器核心通过执行 在低功耗状态下恢复引导代码由易失性存储器维护并通过配置的存储器控​​制器访问，而不是从非易失性存储器访问引导代码。

公开(公告)号：US20130326206A1

公开(公告)日：2013-12-05

申请号：US13547701

申请日：2012-07-12

申请人： Andrew William Lueck ,  Krishna Sai Bernucho ,  Alexander J. Branover ,  Paul Edward Kitchin ,  Ronald Perez ,  Sonu Arora

发明人： Andrew William Lueck ,  Krishna Sai Bernucho ,  Alexander J. Branover ,  Paul Edward Kitchin ,  Ronald Perez ,  Sonu Arora

IPC分类号： G06F9/00 ,  G06F1/24

CPC分类号： G06F9/4418 ,  G06F1/32

摘要： Boot configuration information is stored to a volatile memory of a processing system during a low-power state. When resuming from the low-power state, a processor device accesses configuration information for a memory controller from a non-volatile memory and restores the memory controller using the configuration information so as to permit access to the volatile memory. The processor device then configures the initial contexts one or more processor cores using the core state information maintained by the volatile memory during the low-power state and accessed via the configured memory controller, and the one or more processor cores completes the boot process by executing resume boot code maintained by the volatile memory during the low-power state and accessed via the configured memory controller, rather than accessing boot code from a non-volatile memory.

摘要翻译： 引导配置信息在低功耗状态下被存储到处理系统的易失性存储器。 当从低功率状态恢复时，处理器设备从非易失性存储器访问存储器控制器的配置信息，并使用配置信息恢复存储器控制器，以便允许访问易失性存储器。 然后，处理器设备在低功率状态期间使用由易失性存储器维护的核心状态信息来配置初始上下文一个或多个处理器核心，并经配置的存储器控​​制器访问，并且一个或多个处理器核心通过执行 在低功耗状态下恢复引导代码由易失性存储器维护并通过配置的存储器控​​制器访问，而不是从非易失性存储器访问引导代码。