公开(公告)号：US20190221239A1

公开(公告)日：2019-07-18

申请号：US15874444

申请日：2018-01-18

Applicant: Arm Limited

Inventor： Sumant Kumar Thapliyal ,  Sumeet Sawant ,  Avinash Merugu ,  Deeksha Anandani ,  Veera Raghavulu Marella ,  Srinath Gopinath ,  Abdullah Shahid

IPC: G11C5/06 ,  G11C7/18 ,  G11C8/14

CPC classification number: G11C5/06 ,  G11C7/18 ,  G11C8/14 ,  H01L27/0207

Abstract: Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a bitcell and multiple straps including a first strap, a second strap, and a third strap. The first strap may couple the bitcell to ground. The second strap may couple the bitcell to a bitline. The third strap may couple the bitcell to a wordline within a boundary of the bitcell.

公开(公告)号：US10923161B2

公开(公告)日：2021-02-16

申请号：US15874444

申请日：2018-01-18

Applicant: Arm Limited

Inventor： Sumant Kumar Thapliyal ,  Sumeet Sawant ,  Avinash Merugu ,  Deeksha Anandani ,  Veera Raghavulu Marella ,  Srinath Gopinath ,  Abdullah Shahid

IPC: G11C5/06 ,  G11C8/14 ,  G11C7/18 ,  G11C17/12 ,  H01L27/02 ,  H01L27/112

Abstract: Various implementations described herein are directed to an integrated circuit. The integrated circuit may include a bitcell and multiple straps including a first strap, a second strap, and a third strap. The first strap may couple the bitcell to ground. The second strap may couple the bitcell to a bitline. The third strap may couple the bitcell to a wordline within a boundary of the bitcell.