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公开(公告)号:US20210257999A1
公开(公告)日:2021-08-19
申请号:US17307596
申请日:2021-05-04
Inventor: Bin Li , David Bostedo , Landon J. Caley , Nicholas J. Chiolino , Patrick Fleming , David D. Moser
IPC: H03K3/3562 , H03K19/003
Abstract: A flip-flop and latch circuit is disclosed. The circuit includes a single-input inverter, a dual-input inverter, a single-input tri-state inverter, a dual-input tri-state inverter, and two single-event transient (SET) filters. The single-input tri-state inverter receives an input signal D. The dual-input tri-state inverter includes a first input, a second input and an output, wherein the first input receives output signals from the dual-input inverter and the second input receives output signals from the dual-input inverter via the first SET filter. The output of the dual-input tri-state inverter sends output signals to a first input of the dual-input inverter and a second input of the dual-input inverter via the second SET filter. The single-input inverter receives inputs from the dual-input inverter to provide an output signal Q for the circuit
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公开(公告)号:US20190045675A1
公开(公告)日:2019-02-07
申请号:US15668017
申请日:2017-08-03
Inventor: Bin Li , Lloyd Brown , Patrick Fleming , Jason F. Ross
Abstract: A system for limiting or diminishing current to unpowered Serializer/Deserializer (SerDes) circuitry is provided. The system comprises receiver input termination circuitry and a cold spare circuitry. The receiver input circuitry comprises a termination resistor and an N-type metal oxide silicon field effect transistor (MOSFET). The cold spare circuitry comprises a first MOSFET and a second MOSFET. When the system is powered on, an input current flows to the receiver input termination circuit to be discharged by the N-type MOSFET which is electrically connected to a ground. When the system is powered off, the input current flows to the cold spare circuitry to discharge the input current. Discharging electrons between the first MOSFET and the second MOSFET depends on the polarity of an accumulated voltage.
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