公开(公告)号：US3584289A

公开(公告)日：1971-06-08

申请号：US3584289D

申请日：1969-04-17

Applicant: BELL TELEPHONE LABOR INC

Inventor： BISHOP JOHN D ,  JUDD FRANK F ,  UNTAMO PETER P

IPC: H02M3/338 ,  H02M3/14 ,  H03B5/00 ,  H03K3/281

CPC classification number: H02M3/3388

Abstract: A regulated inverter circuit wherein leading edge pulse width modulation is obtained by employing a modulator control network synchronized with the sinusoidal feedback bias which delays the application of this bias for an interval determined by load voltage variations. Deleting the leading edge of the sinusoidal driving waveform allows the inverter transistors to be efficiently biased from cutoff to saturation and at the same time eliminates the adverse effects of stored charge when the transistors are driven from saturation to cutoff.

公开(公告)号：US3516020A

公开(公告)日：1970-06-02

申请号：US3516020D

申请日：1968-07-19

Applicant: BELL TELEPHONE LABOR INC

Inventor： UNTAMO PETER P

IPC: H02M7/5375 ,  H02M7/5383 ,  H02M7/53846 ,  H02M7/53862 ,  H02M7/52

CPC classification number: H02M7/53862 ,  H02M7/53832