公开(公告)号：US20130141257A1

公开(公告)日：2013-06-06

申请号：US13624228

申请日：2012-09-21

Applicant: BROADCOM CORPORATION

Inventor： Fu-Hsuan Chiu ,  Mark Hahm

IPC: H03M7/00

CPC classification number: H04W56/002 ,  H03M13/3723 ,  H03M13/3905 ,  H03M13/3972 ,  H04L1/005 ,  H04W36/18

Abstract: Disclosed are various embodiments that provide turbo decoding implemented as at least a portion of baseband processing circuitry. A turbo decoder may obtain a data block associated with a transmission time interval, the data block comprising a sequence of bits, the data block being encoded according to a coding rate. An alpha operation is performed on the data block for a first decoding iteration to generate first alpha decode data, the alpha operation for the first decoding iteration being performed continuously. An alpha operation is performed on the data block for a second decoding iteration to generate second alpha decode data, the alpha operation for the second decoding iteration being performed according to a set of alpha evaluation windows. The initialization of the alpha windows during the second alpha decode may be derived from the alpha state data that is stored in memory from the first alpha decode.

Abstract translation: 公开了提供作为基带处理电路的至少一部分实现的turbo解码的各种实施例。 turbo解码器可以获得与传输时间间隔相关联的数据块，所述数据块包括比特序列，所述数据块根据编码速率进行编码。 对第一解码迭代的数据块执行阿尔法操作以产生第一阿尔法解码数据，连续执行第一解码迭代的阿尔法操作。 对第二解码迭代的数据块执行阿尔法操作以产生第二阿尔法解码数据，根据一组α评估窗口进行第二解码迭代的阿尔法操作。 第二个alpha解码期间的alpha窗口的初始化可以从存储在第一个alpha解码器的存储器中的α状态数据导出。

公开(公告)号：US20130262952A1

公开(公告)日：2013-10-03

申请号：US13626317

申请日：2012-09-25

Applicant: BROADCOM CORPORATION

Inventor： Mark Hahm ,  Bin Liu

IPC: H03M13/05 ,  H04L1/18

CPC classification number: H04L1/0052 ,  H03M13/2957 ,  H03M13/3972 ,  H03M13/6306 ,  H04L1/005 ,  H04L1/0066 ,  H04L1/1819 ,  H04L1/1835 ,  H04L1/1845

Abstract: Disclosed are various embodiments that provide turbo decoding implemented as at least a portion of baseband processing circuitry. An input bit stream may be divided into a set of code blocks and a first code block may be separated from the set of code blocks. A hybrid automatic repeat request (HARQ) process is performed on the first code block to generate a processed first code block. The processed first code block is stored in an incremental redundancy (IR) buffer. A turbo decoding process is performed on the processed first code block to generate decoded first code block data and the decoded first code block data is stored in an external memory. The processed first code block is removed from the IR buffer for decoding a remaining portion of the set of code blocks.

Abstract translation: 公开了提供作为基带处理电路的至少一部分实现的turbo解码的各种实施例。 输入比特流可以被划分成一组代码块，并且第一代码块可以与代码块集合分离。 对第一代码块执行混合自动重复请求（HARQ）处理，以产生经处理的第一代码块。 处理的第一代码块被存储在增量冗余（IR）缓冲器中。 对所处理的第一代码块执行turbo解码处理，以生成解码的第一代码块数据，并将解码的第一代码块数据存储在外部存储器中。 经处理的第一代码块从IR缓冲器中移除，用于解码代码块集合的剩余部分。

公开(公告)号：US09209941B2

公开(公告)日：2015-12-08

申请号：US13965071

申请日：2013-08-12

Applicant: Broadcom Corporation

Inventor： Mark Hahm ,  Wei Luo

IPC: H04L1/06 ,  H04B1/7107

CPC classification number: H04L1/0631 ,  H04B1/7107

Abstract: Aspects of a method and system for diversity processing utilizing a programmable interface suppression module may include one or more circuits that are operable to program an interference suppression module based on one or more interference cancellation parameters. A plurality of weighting factor values may be computed based on the one or more interference suppression parameters and a received plurality of multipath signals. A plurality of estimated signal may be generated based on the plurality of weighting factor values. A plurality of updated estimated signals may be generated based on the plurality of estimated signals. A plurality of interference suppressed signals may be generated based on the plurality of updated estimated signals.

Abstract translation: 利用可编程接口抑制模块的用于分集处理的方法和系统的方面可以包括一个或多个可用于基于一个或多个干扰消除参数对干扰抑制模块进行编程的电路。 可以基于一个或多个干扰抑制参数和接收到的多个多径信号来计算多个加权因子值。 可以基于多个加权因子值来生成多个估计信号。 可以基于多个估计信号来生成多个更新的估计信号。 可以基于多个更新的估计信号来生成多个干扰抑制信号。