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公开(公告)号：US20190087265A1
公开(公告)日：2019-03-21
申请号：US15918021
申请日：2018-03-12
发明人： Naoko KIFUNE , Hironori UCHIKAWA , Daiki WATANABE
CPC分类号： G06F11/1068 , G06F11/1012 , G11C29/52 , G11C2029/0411 , H03M13/3905 , H03M13/45 , H03M13/451
摘要： According to an embodiment, a memory system includes: a test pattern decoding unit that detects an intermediate decoding word from a plurality of test patterns; a Euclid distance calculating unit that calculates a Euclid distance between the intermediate decoding word and a received word; and a maximum likelihood decoding word selecting unit that maintains a maximum likelihood decoding word candidate. In a case where a Euclid distance of the intermediate decoding word is shorter than a Euclid distance of the maximum likelihood decoding word candidate, the maximum likelihood decoding word selecting unit updates the maximum likelihood decoding word candidate by using the intermediate decoding word and the test pattern decoding unit does not execute decoding of a test pattern having no possibility that the Euclid distance of the intermediate decoding word becomes shorter than the Euclid distance of the maximum likelihood decoding word candidate.
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公开(公告)号：US20170134120A1
公开(公告)日：2017-05-11
申请号：US15318603
申请日：2015-06-22
发明人： Stefano CALABRO
CPC分类号： H04L1/0055 , H03M13/2792 , H03M13/2927 , H03M13/3905 , H03M13/45 , H04B10/5161 , H04B10/548 , H04B10/612 , H04B10/6165 , H04J14/02 , H04L1/0041 , H04L1/0058 , H04L1/0071
摘要： Disclosed is a method for decoding an optical data signal. Said optical data signal is phase and amplitude modulated according to a constellation diagram with at least eight constellation points representing non-binary symbols. Said decoding method comprises the following steps: —carrying out a carrier phase recovery of a received signal ignoring the possible occurrence of phase slips, —decoding said signal after phase recovery, wherein in said decoding, possible cycle slips occurring during phase recovery are modelled as virtual input to an equivalent encoder assumed by the decoding scheme. Further disclosed are a related encoding method as well as a receiver and a transmitter.
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公开(公告)号：US09337867B2
公开(公告)日：2016-05-10
申请号：US14249609
申请日：2014-04-10
发明人： Shaoliang Zhang , Fatih Yaman , Yequn Zhang
CPC分类号： H03M13/1111 , H03M13/1145 , H03M13/353 , H03M13/3723 , H03M13/3746 , H03M13/3776 , H03M13/3905 , H03M13/3972
摘要： A computer implemented method for a cyclic (forward-backward) decoding for a forward error-correction FEC scheme includes decoding a given k−1th codeword in a block code of length N in an optical communication system, forwarding M symbols' enhanced log likelihood ratios LLRs produced by decoding the k−1th codeword, decoding the kth codeword together with forwarded M symbols' enhanced LLRS, and feeding backward, to the initial step i) decoding, corresponding overlapped M symbols' enhanced LLRs for decoding of the k−1th codeword again.
摘要翻译： 用于前向纠错FEC方案的循环（前向 - 反向）解码的计算机实现方法包括在光通信系统中解码长度为N的块码中的给定k-1个码字，将M个符号的增强对数似然比 通过解码第k-1个码字产生的LLR，将第k个码字与转发的M个符号的增强的LLRS一起解码，并向后馈送到初始步骤i）解码对应的重叠的M个符号的增强的LLR用于第k-1个码字的解码 再次。
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公开(公告)号：US09319018B2
公开(公告)日：2016-04-19
申请号：US13512302
申请日：2009-12-04
申请人： Miguel Lopez , Kenneth Sandberg
发明人： Miguel Lopez , Kenneth Sandberg
CPC分类号： H03G3/3068 , H03G3/3073 , H03G3/3078 , H03M13/3905 , H03M13/41 , H03M13/4138 , H03M13/4146
摘要： Non-linear distortions, called glitches, occur in radio receivers when automatic gain control (AGC) is employed for regulating the dynamic range of the received signal. It is proposed to determine (S1) the occurrence of a glitch caused by operation of the AGC mechanism, and estimate (S2) a representation of how energy of a signal transient associated with the glitch is transferred by digital filter(s) in the receiver. The radio signal is then detected (S3) at least partly based on the estimated representation. In this way, the adverse effects of the glitch can be mitigated and detection of the desired signal can be significantly improved. This also means that the link performance will be significantly improved.
摘要翻译： 当使用自动增益控制（AGC）来调节接收信号的动态范围时，在无线电接收机中发生称为毛刺的非线性失真。 提出确定（S1）由AGC机构的操作引起的毛刺的发生，并且估计（S2）表示与毛刺相关联的信号瞬态的能量如何通过接收机中的数字滤波器传送 。 至少部分地基于估计的表示来检测（S3）无线电信号。 以这种方式，可以减轻毛刺的不利影响，并且可以显着改善所需信号的检测。 这也意味着链路性能将显着提高。
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公开(公告)号：US09318148B2
公开(公告)日：2016-04-19
申请号：US14455816
申请日：2014-08-08
申请人： GLOBALFOUNDRIES INC.
IPC分类号： G11B20/18 , H03M13/13 , H03M5/14 , H03M13/11 , H03M13/29 , H03M13/39 , H03M13/00 , G11B5/008 , G11B20/10
CPC分类号： G11B20/1833 , G11B5/00813 , G11B20/10379 , G11B2020/185 , H03M5/145 , H03M13/1111 , H03M13/13 , H03M13/2957 , H03M13/3905 , H03M13/3972 , H03M13/6325
摘要： In one embodiment, a tape drive system includes a soft detector having logic configured to execute a first forward loop of a detection algorithm on a first block of signal samples during a first time interval, execute a first reverse loop of the detection algorithm on the first block of signal samples during a second time interval, execute a second reverse loop of the detection algorithm on the first block of signal samples during a fifth time interval, and execute a second forward loop of the detection algorithm on the first block of signal samples during a fourth time interval using second soft information. Other tape drive systems and computer program products for decoding data are presented in more embodiments.
摘要翻译： 在一个实施例中，磁带驱动器系统包括软检测器，其具有被配置为在第一时间间隔内对第一信号样本块执行检测算法的第一正向循环的逻辑，在第一时间段执行检测算法的第一反向循环 在第二时间间隔内的信号采样块在第五时间间隔期间对第一信号样本块执行检测算法的第二反向循环，并且在第一信号样本块上执行检测算法的第二正向循环 使用第二软信息的第四时间间隔。 在更多实施例中呈现用于解码数据的其它磁带机系统和计算机程序产品。
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公开(公告)号：US09235488B2
公开(公告)日：2016-01-12
申请号：US14168222
申请日：2014-01-30
申请人： PMC-SIERRA US, INC.
CPC分类号： G06F11/2215 , G06F11/1012 , H03M13/1111 , H03M13/3905 , H03M13/3927
摘要： A random noise generation module for generating noisy LLRs for testing an error correction circuit of a nonvolatile memory storage module. The random noise generation module includes a coefficient generator for generating one or a plurality of coefficients, each of the plurality of coefficients associated with one region of a plurality of regions defining a linear space proportionately divided according to an area under a probability distribution curve for a nonvolatile memory storage module. The random noise generation module further includes a linear random number generator for generating a linear random number and a comparator for comparing the linear random number to one or more of the plurality of coefficients to identify the region of the plurality of regions of the probability distribution curve in which the linear random number belongs to generate a noisy LLR for testing an error correction circuit of a nonvolatile memory storage module.
摘要翻译： 一种随机噪声生成模块，用于产生用于测试非易失性存储器存储模块的纠错电路的噪声LLR。 所述随机噪声生成模块包括用于产生一个或多个系数的系数发生器，所述多个系数中的每一个与多个区域中的一个区域相关联，所述多个区域定义根据在概率分布曲线下的区域成比例地划分的线性空间 非易失性存储器存储模块。 随机噪声生成模块还包括用于生成线性随机数的线性随机数发生器和用于将线性随机数与多个系数中的一个或多个进行比较的比较器，以识别概率分布曲线的多个区域的区域 其中线性随机数属于产生用于测试非易失性存储器存储模块的纠错电路的噪声LLR。
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7.发明授权Processor for processing digital data with pipelined butterfly operator for the execution of an FFT/IFFT and telecommunication device 有权用于使用流水线蝶形运算符处理数字数据的处理器，用于执行FFT / IFFT和电信设备公开(公告)号：US09104615B2
公开(公告)日：2015-08-11
申请号：US13702769
申请日：2011-05-31
申请人： Dominique Noguet , Malek Naoues
发明人： Dominique Noguet , Malek Naoues
CPC分类号： G06F17/142 , H03M13/3905 , H03M13/4107 , H04L27/265
摘要： A processor for processing digital data includes at least one butterfly operator for execution of a fast Fourier transform computation, the butterfly operator having a pipeline architecture for synchronized receiving and processing of input data according to a clock signal. This pipeline architecture includes a plurality of elements including addition, subtraction, and multiplication hardware modules and links for synchronized transmission of data between the modules. At least one element of this pipeline architecture is configurable by at least one programmable parameter, between a first configuration wherein the butterfly operator performs the fast Fourier transform computation and a second configuration wherein the butterfly operator performs a metric computation of an implementation of a channel decoding algorithm.
摘要翻译： 用于处理数字数据的处理器包括用于执行快速傅立叶变换计算的至少一个蝶形运算器，蝶形运算器具有用于根据时钟信号同步接收和处理输入数据的流水线架构。 该流水线架构包括多个元件，包括用于在模块之间同步传输数据的加法，减法和乘法硬件模块和链接。 在第一配置中，蝶形运算符执行快速傅里叶变换计算和第二配置，其中蝶形运算符执行信道解码的实现的度量计算，该流水线架构的至少一个元件可由至少一个可编程参数来配置 算法。
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公开(公告)号：US09077384B1
公开(公告)日：2015-07-07
申请号：US13651853
申请日：2012-10-15
发明人： Moshe Haiut
CPC分类号： H03M13/2993 , H03M13/2957 , H03M13/3905 , H03M13/3922 , H03M13/6505
摘要： Methods and apparatus are described for reducing memory storage cells in a turbo decoder by storing only half the state metrics generated during a scan process. States associated with each bit transmission may be divided into couples and only one state from every state couple may be stored. In one example embodiment, only the state metric for a losing state of every state couple is saved, along with a single bit, e.g., 1 or 0, indicating whether the upper state or lower state of the state couple was the winner. The winning state may be reconstituted at a later stage. In this manner, for a code rate 1/3 and constraint length 3 turbo code, instead of storing 8*10=80 bits of state metrics for each systematic bit, only (4*10)+(4*1)=44 bits of scan state metrics data need be stored, a savings of nearly 50% regardless of the transistor technology used.
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公开(公告)号：US08990668B2
公开(公告)日：2015-03-24
申请号：US13829904
申请日：2013-03-14
CPC分类号： G06F12/0246 , G06F11/1012 , G06F12/0238 , G11C7/14 , G11C11/5642 , G11C29/028 , G11C29/42 , G11C29/52 , G11C2029/0411 , H03M13/1102 , H03M13/256 , H03M13/3723 , H03M13/3905 , H03M13/41 , H03M13/45 , H03M13/6325 , H04L1/005
摘要： Embodiments of decoding data stored in solid-state memory arrays are disclosed. In one embodiment, multiple read operations are performed while taking inter-cell interference (ICI) into account. Soft-decision information, such as log-likelihood ratios (LLRs), is determined by using known data and its corresponding multi-read output. Soft-decision information is provided to a detector. Reliability is improved and performance is increased.
摘要翻译： 公开了存储在固态存储器阵列中的数据的解码实施例。 在一个实施例中，在考虑小区间干扰（ICI）的同时执行多次读取操作。 通过使用已知数据及其对应的多读输出来确定诸如对数似然比（LLR）之类的软判决信息。 软判决信息提供给检测器。 可靠性得到改善，性能提高。
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公开(公告)号：US08898547B2
公开(公告)日：2014-11-25
申请号：US12463386
申请日：2009-05-09
CPC分类号： H03M13/3905 , H03M13/256 , H03M13/258 , H03M13/2957 , H03M13/3988 , H03M13/6362 , H03M13/6516
摘要： Rate control adaptable communications. A common trellis is employed at both ends of a communication system (in an encoder and decoder) to code and decode data at different rates. The encoding employs a single encoder whose output bits may be selectively punctured to support multiple modulations (constellations and mappings) according to a rate control sequence. A single decoder is operable to decode each of the various rates at which the data is encoded by the encoder. The rate control sequence may include a number of rate controls arranged in a period that is repeated during encoding and decoding. Either one or both of the encoder and decoder may adaptively select a new rate control sequence based on a variety of operational parameters including operating conditions of the communication system, a change in signal to noise ratio (SNR), etc.
摘要翻译： 速率控制适应通信。 在通信系统（编码器和解码器）的两端采用通用网格，以不同速率对数据进行编码和解码。 编码采用单个编码器，其输出位可以被选择性地打孔以支持根据速率控制序列的多个调制（星座和映射）。 单个解码器可操作以解码编码器对数据进行编码的各种速率中的每一个。 速率控制序列可以包括在编码和解码期间重复的周期中布置的速率控制的数量。 编码器和解码器中的一个或两者可以基于包括通信系统的操作条件，信噪比（SNR）等的变化的各种操作参数自适应地选择新的速率控制序列。
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