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    NOISE CANCELLATION
    1.
    发明申请
    NOISE CANCELLATION 有权
    噪音消除

    公开(公告)号：US20160078855A1

    公开(公告)日：2016-03-17

    申请号：US14948852

    申请日：2015-11-23

    Applicant: Cirrus Logic International Semiconductor Ltd.

    Inventor： Richard Clemow

    IPC: G10K11/00 ,  G10K11/178 ,  H04R1/10 ,  H03G3/00

    CPC classification number: G10K11/002 ,  G10K11/175 ,  G10K11/178 ,  G10K2210/3027 ,  G10K2210/3028 ,  H03G3/002 ,  H04R1/1008

    Abstract: A noise cancellation signal is generated by generating an ambient noise signal, representing ambient noise, and generating a noise cancellation signal, by applying the ambient noise signal to an feedforward filter, where the feedforward filter comprises a high-pass filter having an adjustable cut-off frequency, and by applying a controllable gain. The noise cancellation signal is then applied to a loudspeaker, to generate a sound to at least partially cancel the ambient noise. An error signal is generated, representing unwanted sound in the region of the loudspeaker. The phase of the ambient noise signal is compared to a phase of the error signal, and the gain is controlled on the basis of a result of the comparison, taking account of a phase shift introduced by the high-pass filter when performing the comparison.

    Abstract translation: 噪声消除信号是通过将环境噪声信号施加到前馈滤波器来产生表示环境噪声的环境噪声信号，以及产生噪声消除信号，其中前馈滤波器包括具有可调节切断信号的高通滤波器， 关闭频率，并通过应用可控增益。 然后将噪声消除信号施加到扬声器，以产生声音以至少部分地消除环境噪声。 产生一个错误信号，表示扬声器区域内的不必要的声音。 将环境噪声信号的相位与误差信号的相位进行比较，并且在进行比较时考虑到高通滤波器引入的相移，基于比较结果来控制增益。

    Digital circuit arrangements for ambient noise-reduction
    2.
    发明授权
    Digital circuit arrangements for ambient noise-reduction 有权

    公开(公告)号：US10818281B2

    公开(公告)日：2020-10-27

    申请号：US16394488

    申请日：2019-04-25

    Applicant: Cirrus Logic International Semiconductor Ltd.

    Inventor： Richard Clemow

    IPC: G10K11/178 ,  H04R1/10 ,  H04R3/02 ,  G10K11/16

    Abstract: A digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible. The arrangement converts the analog signals into N-bit digital signals at sample rate f0, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.

    Digital circuit arrangements for ambient noise-reduction
    4.
    发明授权
    Digital circuit arrangements for ambient noise-reduction 有权

    公开(公告)号：US10319361B2

    公开(公告)日：2019-06-11

    申请号：US15383839

    申请日：2016-12-19

    Applicant: Cirrus Logic International Semiconductor Ltd.

    Inventor： Richard Clemow

    IPC: H04R1/10 ,  H04R3/02 ,  G10K11/16 ,  G10K11/178

    Abstract: A digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible. The arrangement converts the analog signals into N-bit digital signals at sample rate f0, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.

    Noise cancellation system with lower rate emulation
    5.
    发明授权
    Noise cancellation system with lower rate emulation 有权

    公开(公告)号：US10147413B2

    公开(公告)日：2018-12-04

    申请号：US15482258

    申请日：2017-04-07

    Applicant: Cirrus Logic International Semiconductor Ltd.

    Inventor： Anthony J. Magrath ,  Richard Clemow

    IPC: G10K11/178 ,  H04R3/00

    Abstract: A noise cancellation system, comprising: an input for a digital signal, the digital signal having a first sample rate; a digital filter, connected to the input to receive the digital signal; a decimator, connected to the input to receive the digital signal and to generate a decimated signal at a second sample rate lower than the first sample rate; and a processor. The processor comprises: an emulation of the digital filter, connected to receive the decimated signal and to generate an emulated filter output; and a control circuit, for generating a control signal on the basis of the emulated filter output. The control signal is applied to the digital filter to control a filter characteristic thereof.

    DIGITAL CIRCUIT ARRANGEMENTS FOR AMBIENT NOISE-REDUCTION
    8.
    发明申请
    DIGITAL CIRCUIT ARRANGEMENTS FOR AMBIENT NOISE-REDUCTION 审中-公开

    公开(公告)号：US20170103746A1

    公开(公告)日：2017-04-13

    申请号：US15383839

    申请日：2016-12-19

    Applicant: Cirrus Logic International Semiconductor Ltd.

    Inventor： Richard Clemow

    IPC: G10K11/178 ,  H04R1/10

    CPC classification number: G10K11/178 ,  G10K11/16 ,  G10K2210/1081 ,  G10K2210/3051 ,  G10K2210/3217 ,  H04R1/1083 ,  H04R3/02

    Abstract: A digital circuit arrangement for an ambient noise-reduction system affording a higher degree of noise reduction than has hitherto been possible. The arrangement converts the analog signals into N-bit digital signals at sample rate f0, and then subjects the converted signals to digital filtering. The value of N in some embodiments is 1 but, in any event, is no greater than 8, and f0 may be 64 times the Nyquist sampling rate but, in any event, is substantially greater than the Nyquist sampling rate. This permits digital processing to be used without incurring group delay problems that rule out the use of conventional digital processing in this context. Furthermore, adjustment of the group delay can readily be achieved, in units of a fraction of a micro-second, providing the ability to fine tune the group delay for feed forward applications.

    Noise cancellation
    9.
    发明授权
    Noise cancellation 有权

    公开(公告)号：US09430999B2

    公开(公告)日：2016-08-30

    申请号：US14948852

    申请日：2015-11-23

    Applicant: Cirrus Logic International Semiconductor Ltd.

    Inventor： Richard Clemow

    IPC: G10K11/00 ,  G10K11/175 ,  G10K11/178 ,  H03G3/00 ,  H04R1/10

    CPC classification number: G10K11/002 ,  G10K11/175 ,  G10K11/178 ,  G10K2210/3027 ,  G10K2210/3028 ,  H03G3/002 ,  H04R1/1008

    Abstract: A noise cancellation signal is generated by generating an ambient noise signal, representing ambient noise, and generating a noise cancellation signal, by applying the ambient noise signal to an feedforward filter, where the feedforward filter comprises a high-pass filter having an adjustable cut-off frequency, and by applying a controllable gain. The noise cancellation signal is then applied to a loudspeaker, to generate a sound to at least partially cancel the ambient noise. An error signal is generated, representing unwanted sound in the region of the loudspeaker. The phase of the ambient noise signal is compared to a phase of the error signal, and the gain is controlled on the basis of a result of the comparison, taking account of a phase shift introduced by the high-pass filter when performing the comparison.

    Noise cancellation system with lower rate emulation
    10.
    发明授权
    Noise cancellation system with lower rate emulation 有权

    公开(公告)号：US10431198B2

    公开(公告)日：2019-10-01

    申请号：US15958028

    申请日：2018-04-20

    Applicant: Cirrus Logic International Semiconductor Ltd.

    Inventor： Anthony J. Magrath ,  Richard Clemow

    IPC: H04R3/00 ,  G10K11/178

    Abstract: A noise cancellation system, comprising: an input for a digital signal, the digital signal having a first sample rate; a digital filter, connected to the input to receive the digital signal; a decimator, connected to the input to receive the digital signal and to generate a decimated signal at a second sample rate lower than the first sample rate; and a processor. The processor comprises: an emulation of the digital filter, connected to receive the decimated signal and to generate an emulated filter output; and a control circuit, for generating a control signal on the basis of the emulated filter output. The control signal is applied to the digital filter to control a filter characteristic thereof.

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