Computer system including a write protection circuit for preventing
illegal write operations and a write poster with improved memory
    1.
    发明授权
    Computer system including a write protection circuit for preventing illegal write operations and a write poster with improved memory 失效
    计算机系统包括用于防止非法写入操作的写入保护电路和具有改进的存储器的写入海报

    公开(公告)号:US5325499A

    公开(公告)日:1994-06-28

    申请号:US590671

    申请日:1990-09-28

    Abstract: A computer system including a write protection circuit and a write poster is disclosed. The write protection circuit provides page description information to the computer system for controlling various operations. Illegal write operations as defined by the page description information are prevented from reaching a system bus and external cache. Internal cache invalidate operations may also be performed transparently to system operation. The write poster accepts write operations in zero wait states and assembles them into fewer more efficient writes to memory. A unique method and apparatus for programming a descriptor random access memory (RAM) is also provided.

    Abstract translation: 公开了一种包括写保护电路和写海报的计算机系统。 写保护电路向计算机系统提供页面描述信息以控制各种操作。 防止由页面描述信息定义的非法写入操作到达系统总线和外部高速缓存。 内部缓存无效操作也可能对系统操作透明地执行。 写海报接受零等待状态的写操作,并将它们组合成更少的更有效的写入到内存。 还提供了用于编程描述符随机存取存储器(RAM)的独特方法和装置。

    Data loop port acceleration circuit
    2.
    发明授权
    Data loop port acceleration circuit 失效
    数据环路端口加速电路

    公开(公告)号:US07545817B1

    公开(公告)日:2009-06-09

    申请号:US10724957

    申请日:2003-12-01

    CPC classification number: H04L12/433 H04L45/00

    Abstract: An apparatus associated with a device connected to a data loop processes data received from the data loop to determine whether data from the data loop is to be routed back to the data loop. The apparatus may determine how to route data based on an analysis of whether the device is authorized to participate in a conversation currently associated with the data loop. Thus, latency otherwise imparted by the device when the device processes the data may be avoided.

    Abstract translation: 与连接到数据环路的设备相关联的设备处理从数据环路接收到的数据,以确定来自数据环路的数据是否被路由回到数据环路。 该装置可以基于对设备是否被授权参与当前与数据循环相关联的对话的分析来确定如何路由数据。 因此,可以避免在设备处理数据时由设备赋予的延迟。

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