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1.发明授权Arrangement for carrying out alternatively addition or one of a number of logical functions between the contents in a position of two binary words 失效执行相互补充的安排或两个二进制位置之间的内容之间的一些逻辑功能的安排
公开(公告)号：US3584207A
公开(公告)日：1971-06-08
申请号：US3584207D
申请日：1968-08-19
Applicant: ERICSSON TELEFON AB L M
Inventor： AVSAN OLEG , HJALM FRITZ GUSTAV TORSTEN
CPC classification number: G06F7/505 , G06F7/501 , G06F7/575 , H03K19/1733
Abstract: There is disclosed a multicell arithmetic unit which can either perform an addition of two binary words or one of a plurality of logical operations on the two binary words. Each cell of the unit processes one position of the operands and has a carry input, inputs for the operands, inputs for the complements of the operands, an input indicating addition and inputs indicating logical functions. Four NAND gates have pairs of inputs connected to combinations of the operand inputs and the complements of the operand inputs. The inputs of the NAND gates are controlled by logical networks which receive signals from the inputs indicating addition, indicating logical functions and the carry input. The output of a cell is the output of a four-input AND circuit whose inputs are connected to the different outputs of the NAND circuits.
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