公开(公告)号：US09490926B2

公开(公告)日：2016-11-08

申请号：US14083561

申请日：2013-11-19

Applicant: Electronics and Telecommunications Research Institute

Inventor： Bup-Joong Kim ,  Tae-Sik Cheung ,  Bheom-Soon Joo ,  Jong-Hyun Lee

IPC: G06F1/12 ,  H04J3/06 ,  H04N21/43

CPC classification number: H04J3/0697 ,  H04J3/0667 ,  H04N21/4302

Abstract: A processor time synchronization apparatus and method in a data communication system which includes a plurality of processors and line interfaces. The processor time synchronization apparatus includes a first local processor configured to recognize a time difference between an external device and the system based on a time message exchanged with the external device, and synchronize time between the external device and the system, and a second local processor configured to receive time information from the first local processor that has been time-synchronized with the external device, the time information containing the time difference between the external device and the system, and synchronize the first local processor with a system's internal time using the received time information.

Abstract translation: 一种包括多个处理器和线路接口的数据通信系统中的处理器时间同步装置和方法。 处理器时间同步装置包括：第一本地处理器，被配置为基于与外部设备交换的时间消息来识别外部设备与系统之间的时间差，并且同步外部设备与系统之间的时间;以及第二本地处理器 被配置为从与所述外部设备时间同步的所述第一本地处理器接收时间信息，所述时间信息包含所述外部设备和所述系统之间的时间差，并且使用所接收到的所述第一本地处理器与系统的内部时间同步 时间信息。