Abstract:
A processor time synchronization apparatus and method in a data communication system which includes a plurality of processors and line interfaces. The processor time synchronization apparatus includes a first local processor configured to recognize a time difference between an external device and the system based on a time message exchanged with the external device, and synchronize time between the external device and the system, and a second local processor configured to receive time information from the first local processor that has been time-synchronized with the external device, the time information containing the time difference between the external device and the system, and synchronize the first local processor with a system's internal time using the received time information.
Abstract:
Provided is a failure recovery method in a non-revertive mode of an Ethernet ring network. In an Ethernet ring network, link priorities between nodes or node priorities are determined based on media access control (MAC) addresses and the nodes having blocked ports are determined after failures are recovered from based on the priorities so that the blocked ports can be distributed.