公开(公告)号：US20140273463A1

公开(公告)日：2014-09-18

申请号：US13841855

申请日：2013-03-15

Applicant: GLOBALFOUNDRIES, INC.

Inventor： Denis Shamiryan ,  Adam Michal Urbanowicz

IPC: H01L21/311

CPC classification number: H01L21/31116 ,  H01L21/3105 ,  H01L21/31058 ,  H01L21/31138

Abstract: Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a sidewall in a porous low-k dielectric layer that overlies a semiconductor substrate using a plurality of discontinuous etching treatments. Exposed portions of the sidewall are progressively sealed interposingly between the discontinuous etching treatments to form a sealed sidewall. The sealed sidewall defines a trench in the porous low-k dielectric layer.

Abstract translation: 提供了制造集成电路的方法。 在一个示例中，制造集成电路的方法包括在多个低k电介质层中形成侧壁，所述多孔低k电介质层使用多次不连续蚀刻处理覆盖在半导体衬底上。 侧壁的暴露部分逐渐密封在不连续的蚀刻处理之间以形成密封的侧壁。 密封的侧壁在多孔低k电介质层中限定沟槽。