公开(公告)号：US10788877B1

公开(公告)日：2020-09-29

申请号：US16787520

申请日：2020-02-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Sebastian T. Ventrone ,  Lansing D. Pickup

IPC: G06F1/32 ,  H03K3/037 ,  H03K17/00 ,  G06F1/04

Abstract: Embodiments of the disclosure provide a low power multiplexer (MUX) circuit, including: a first data input coupled to an input of a first pass gate device; a second data input coupled to an input of a second pass gate device; a hold latch having an input coupled to a data output of the MUX circuit and an output coupled to an input of a supplemental pass gate device; and a pulse generator for generating a HOLD pulse signal, wherein the HOLD pulse signal is coupled to a control input of the supplemental pass gate device. The hold latch is configured to hold a previously valid output data signal of the MUX circuit until a valid input data signal is available at the first data input or the second data input.