公开(公告)号：US20190214298A1

公开(公告)日：2019-07-11

申请号：US15868479

申请日：2018-01-11

Applicant: GLOBALFOUNDRIES INC.

Inventor： Jason E. STEPHENS ,  Daniel CHANEMOUGAME ,  Ruilong XIE ,  Lars W. LIEBMANN ,  Gregory A. NORTHROP

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/528

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to middle of the line self-aligned direct pattern contacts and methods of manufacture. The structures described herein include: at least one gate structure with a metallization and source/drain regions; a source/drain contact in electrical connection with the source/drain regions, respectively; and a contact structure with a re-entrant profile in electrical connection with the source/drain contact and the metallization of the at least one gate structure, respectively.

公开(公告)号：US20200083102A1

公开(公告)日：2020-03-12

申请号：US16685648

申请日：2019-11-15

Applicant: GLOBALFOUNDRIES INC.

Inventor： Jason E. STEPHENS ,  Daniel CHANEMOUGAME ,  Ruilong XIE ,  Lars W. LIEBMANN ,  Gregory A. NORTHROP

IPC: H01L21/768 ,  H01L23/528 ,  H01L23/522

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to middle of the line self-aligned direct pattern contacts and methods of manufacture. The structures described herein include: at least one gate structure with a metallization and source/drain regions; a source/drain contact in electrical connection with the source/drain regions, respectively; and a contact structure with a re-entrant profile in electrical connection with the source/drain contact and the metallization of the at least one gate structure, respectively.

公开(公告)号：US20200006112A1

公开(公告)日：2020-01-02

申请号：US16568902

申请日：2019-09-12

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicholas V. LICAUSI ,  Guillaume BOUCHE ,  Lars W. LIEBMANN

IPC: H01L21/74 ,  H01L27/108 ,  H01L27/088 ,  H01L27/092

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to self-aligned buried power rail structures and methods of manufacture. The method includes: forming at least one fin structure of a first dimension in a substrate; forming at least one fin structure of a second dimension in the substrate; removing at least a portion of the at least one fin structure of the second dimension to form a trench; filling the trench with conductive metal to form a buried power rail structure within the trench; and forming a contact to the buried power rail structure.

公开(公告)号：US20190206787A1

公开(公告)日：2019-07-04

申请号：US15860171

申请日：2018-01-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： Guillaume BOUCHE ,  Lars W. LIEBMANN

IPC: H01L23/522 ,  H01L23/538 ,  H01L21/28

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to interrupted small block shape structures (e.g., cut metal lines forming cell boundaries) and methods of manufacture. The structure includes: a plurality of wiring lines with cuts that form a cell boundary; and at least one wiring line extending beyond the cell boundary and which is continuous from cell to cell.

公开(公告)号：US20180294267A1

公开(公告)日：2018-10-11

申请号：US15481826

申请日：2017-04-07

Applicant: GLOBALFOUNDRIES INC.

Inventor： Nicholas V. LICAUSI ,  Guillaume BOUCHE ,  Lars W. LIEBMANN

IPC: H01L27/108 ,  H01L27/088 ,  H01L27/092 ,  H01L21/74

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to self-aligned buried power rail structures and methods of manufacture. The method includes: forming at least one fin structure of a first dimension in a substrate; forming at least one fin structure of a second dimension in the substrate; removing at least a portion of the at least one fin structure of the second dimension to form a trench; filling the trench with conductive metal to form a buried power rail structure within the trench; and forming a contact to the buried power rail structure.