公开(公告)号：US09286969B2

公开(公告)日：2016-03-15

申请号：US14317806

申请日：2014-06-27

Applicant: GLOBALFOUNDRIES INC.

Inventor： Pankaj Agarwal ,  Shiju K. Kandiyil ,  Krishnan S. Rengarajan

IPC: G11C11/00 ,  G11C11/419

CPC classification number: G11C11/419 ,  G11C7/065

Abstract: A low power sense amplifier for an SRAM is described. A first pass gate transistor is driven by bit line true and a second pass gate transistor is driven by bit line complement. A first pull down transistor driven by the bit line complement is coupled to the first pass gate transistor, and a second pull down transistor driven by the bit line true is coupled to the second pass gate transistor. A data line true is coupled to a node coupling the first pass gate transistor with the first pull down transistor and a data line complement is coupled to a node coupling the second pass gate transistor with the second pull down transistor. A current cut-off device cuts off parasitic current from flowing through the first pass gate transistor and the first pull down transistor and through the second pass gate transistor and the second pull down transistor.

Abstract translation: 描述了用于SRAM的低功率读出放大器。 第一栅极晶体管由位线为真，第二通道栅极晶体管由位线补码驱动。 由位线补码驱动的第一下拉晶体管耦合到第一栅极晶体管，并且由位线驱动的第二下拉晶体管真实耦合到第二栅极晶体管。 数据线true耦合到将第一通道栅极晶体管与第一下拉晶体管耦合的节点，并且数据线补码耦合到将第二通过栅极晶体管与第二下拉晶体管耦合的节点。 电流截止装置切断寄生电流流过第一栅极晶体管和第一下拉晶体管，并通过第二栅极晶体管和第二下拉晶体管。