公开(公告)号：US09704575B1

公开(公告)日：2017-07-11

申请号：US14990125

申请日：2016-01-07

Applicant: GLOBALFOUNDRIES INC.

Inventor： Igor Arsovski ,  Michael T. Fragano ,  Robert M. Houle ,  Thomas M. Maffitt

IPC: G11C7/00 ,  G11C15/04

CPC classification number: G11C15/04

Abstract: Words of data are maintained in content-addressable memory cells arranged in rows. Two of the rows are timing reference rows, and the remainder of the rows are data rows that maintain the words of data. The data rows form individual matchlines. A first of the reference rows forms a precharge reference matchline, and a second of the reference rows forms an evaluation reference matchline. The timing for the individual matchlines to precharge is based on the time to precharge the precharge reference matchline, and timing for the individual matchlines to evaluate a search word is based on the time for the evaluation reference matchline to evaluate the search word.

公开(公告)号：US09916896B1

公开(公告)日：2018-03-13

申请号：US15340579

申请日：2016-11-01

Applicant: GLOBALFOUNDRIES INC.

Inventor： Igor Arsovski ,  Robert M. Houle ,  Michael T. Fragano ,  Akhilesh Patil ,  Van D. Butler

IPC: G11C7/00 ,  G11C15/04 ,  G11C29/12

CPC classification number: G11C15/04 ,  G11C7/12 ,  G11C29/021 ,  G11C29/025 ,  G11C29/026 ,  G11C29/12 ,  G11C2029/1204

Abstract: The present disclosure relates to a pre-charge circuit including a first inverter which receives an early pre-charge signal and outputs an inverted early pre-charge signal, a first gate which receives a late pre-charge signal and a match line output signal and outputs an AND output signal, and a second gate which receives the inverted early pre-charge signal and the AND output signal and outputs an effective pre-charge signal.

公开(公告)号：US20170200500A1

公开(公告)日：2017-07-13

申请号：US14990125

申请日：2016-01-07

Applicant: GLOBALFOUNDRIES INC.

Inventor： Igor Arsovski ,  Michael T. Fragano ,  Robert M. Houle ,  Thomas M. Maffitt

IPC: G11C15/04

CPC classification number: G11C15/04

Abstract: Words of data are maintained in content-addressable memory cells arranged in rows. Two of the rows are timing reference rows, and the remainder of the rows are data rows that maintain the words of data. The data rows form individual matchlines. A first of the reference rows forms a precharge reference matchline, and a second of the reference rows forms an evaluation reference matchline. The timing for the individual matchlines to precharge is based on the time to precharge the precharge reference matchline, and timing for the individual matchlines to evaluate a search word is based on the time for the evaluation reference matchline to evaluate the search word.

公开(公告)号：US09583192B1

公开(公告)日：2017-02-28

申请号：US15164325

申请日：2016-05-25

Applicant: GLOBALFOUNDRIES INC.

Inventor： Igor Arsovski ,  Michael T. Fragano ,  Thomas M. Maffitt ,  Robert M. Houle

IPC: G11C15/04 ,  G11C15/00 ,  G11C7/08 ,  G11C7/12

CPC classification number: G11C15/04 ,  G11C7/08 ,  G11C7/12 ,  G11C15/00

Abstract: The present disclosure relates to content addressable memories (CAM), and more particularly, to a searchable CAM structure having self-reference matchline precharge and local feedback control and method of use. The present disclosure includes a structure which includes: a sense line connected to a sensing device; a feedback line connected to the sense line at a tap point between a first end and a second end of the sense line; and a local precharge controller connected to the tap point by the feedback line to control precharging of the sense line according to a state of the feedback line.

Abstract translation: 本公开涉及内容可寻址存储器（CAM），更具体地，涉及具有自参考匹配线预充电和本地反馈控制以及使用方法的可搜索CAM结构。 本公开包括：结构，其包括：感测线，连接到感测装置; 在感测线的第一端和第二端之间的抽头点处连接到感测线的反馈线; 以及通过反馈线连接到分接点的局部预充电控制器，以根据反馈线的状态控制感测线的预充电。