公开(公告)号：US09704575B1

公开(公告)日：2017-07-11

申请号：US14990125

申请日：2016-01-07

Applicant: GLOBALFOUNDRIES INC.

Inventor： Igor Arsovski ,  Michael T. Fragano ,  Robert M. Houle ,  Thomas M. Maffitt

IPC: G11C7/00 ,  G11C15/04

CPC classification number: G11C15/04

Abstract: Words of data are maintained in content-addressable memory cells arranged in rows. Two of the rows are timing reference rows, and the remainder of the rows are data rows that maintain the words of data. The data rows form individual matchlines. A first of the reference rows forms a precharge reference matchline, and a second of the reference rows forms an evaluation reference matchline. The timing for the individual matchlines to precharge is based on the time to precharge the precharge reference matchline, and timing for the individual matchlines to evaluate a search word is based on the time for the evaluation reference matchline to evaluate the search word.

公开(公告)号：US20170200500A1

公开(公告)日：2017-07-13

申请号：US14990125

申请日：2016-01-07

Applicant: GLOBALFOUNDRIES INC.

Inventor： Igor Arsovski ,  Michael T. Fragano ,  Robert M. Houle ,  Thomas M. Maffitt

IPC: G11C15/04

CPC classification number: G11C15/04

Abstract: Words of data are maintained in content-addressable memory cells arranged in rows. Two of the rows are timing reference rows, and the remainder of the rows are data rows that maintain the words of data. The data rows form individual matchlines. A first of the reference rows forms a precharge reference matchline, and a second of the reference rows forms an evaluation reference matchline. The timing for the individual matchlines to precharge is based on the time to precharge the precharge reference matchline, and timing for the individual matchlines to evaluate a search word is based on the time for the evaluation reference matchline to evaluate the search word.

公开(公告)号：US09583192B1

公开(公告)日：2017-02-28

申请号：US15164325

申请日：2016-05-25

Applicant: GLOBALFOUNDRIES INC.

Inventor： Igor Arsovski ,  Michael T. Fragano ,  Thomas M. Maffitt ,  Robert M. Houle

IPC: G11C15/04 ,  G11C15/00 ,  G11C7/08 ,  G11C7/12

CPC classification number: G11C15/04 ,  G11C7/08 ,  G11C7/12 ,  G11C15/00

Abstract: The present disclosure relates to content addressable memories (CAM), and more particularly, to a searchable CAM structure having self-reference matchline precharge and local feedback control and method of use. The present disclosure includes a structure which includes: a sense line connected to a sensing device; a feedback line connected to the sense line at a tap point between a first end and a second end of the sense line; and a local precharge controller connected to the tap point by the feedback line to control precharging of the sense line according to a state of the feedback line.

Abstract translation: 本公开涉及内容可寻址存储器（CAM），更具体地，涉及具有自参考匹配线预充电和本地反馈控制以及使用方法的可搜索CAM结构。 本公开包括：结构，其包括：感测线，连接到感测装置; 在感测线的第一端和第二端之间的抽头点处连接到感测线的反馈线; 以及通过反馈线连接到分接点的局部预充电控制器，以根据反馈线的状态控制感测线的预充电。

公开(公告)号：US09384792B2

公开(公告)日：2016-07-05

申请号：US14580589

申请日：2014-12-23

Applicant: GLOBALFOUNDRIES INC.

Inventor： Anthony R. Bonaccio ,  John K. DeBrosse ,  Thomas M. Maffitt

IPC: G11C7/02 ,  G11C7/06 ,  G11C11/16 ,  G11C29/02

CPC classification number: G11C7/065 ,  G11C7/062 ,  G11C11/1673 ,  G11C29/026 ,  G11C29/028

Abstract: Embodiments are directed to a self-reference STT-MRAM sensing scheme that uses offset-cancellation to reduce the impact of FET mismatch and thereby allow the sensing of lower read voltages. In some embodiments, the sensing scheme includes a differential amplifier having a first input connected to a memory cell. In some embodiments, a second input of the differential amplifier may be connected to ground, a common mode voltage of the system or a mid-level supply voltage. The present disclosure provides flexibility with respect to the voltage level at which the sensing is performed (e.g., ground, Voc, Vmid, etc.). The present disclosure provides further flexibility with respect to the sense voltage polarity.

Abstract translation: 实施例涉及使用偏移消除以减少FET失配的影响并因此允许感测较低读取电压的自参考STT-MRAM感测方案。 在一些实施例中，感测方案包括具有连接到存储器单元的第一输入的差分放大器。 在一些实施例中，差分放大器的第二输入可以连接到地，系统的共模电压或中间电源电压。 本公开提供了关于执行感测的电压电平（例如，地面，Voc，Vmid等）的灵活性。 本公开提供了关于感测电压极性的进一步的灵活性。