公开(公告)号：US20180374749A1

公开(公告)日：2018-12-27

申请号：US15630002

申请日：2017-06-22

Applicant: GLOBALFOUNDRIES INC.

Inventor： Keith Kwong Hon WONG ,  Wonwoo KIM ,  Praneet ADUSUMILLI

IPC: H01L21/768 ,  H01L23/535 ,  H01L23/532

Abstract: A cobalt contact includes a dual silicide barrier layer. The barrier layer, which may be formed in situ, includes silicides of titanium and cobalt, and provides an effective adhesion layer between the cobalt contact and a conductive device region such as the source/drain junction of a semiconductor device, eliminating void formation during a metal anneal.

公开(公告)号：US20150349054A1

公开(公告)日：2015-12-03

申请号：US14822345

申请日：2015-08-10

Applicant: GLOBALFOUNDRIES INC.

Inventor： InSoo JUNG ,  Wonwoo KIM

IPC: H01L29/06 ,  H01L29/161 ,  H01L29/78

CPC classification number: H01L29/0657 ,  H01L21/02532 ,  H01L21/3081 ,  H01L29/161 ,  H01L29/66795 ,  H01L29/785

Abstract: A method of forming double and/or multiple numbers of fins of a FinFET device using a Si/SiGe selective epitaxial growth process and the resulting device are provided. Embodiments include forming a Si pillar in an oxide layer, the Si pillar having a bottom portion and a top portion; removing the top portion of the Si pillar; forming a SiGe pillar on the bottom portion of the Si pillar; reducing the SiGe pillar; forming a first set of Si fins on opposite sides of the reduced SiGe pillar; removing the SiGe pillar; replacing the Si fins with SiGe fins; reducing the SiGe fins; forming a second set of Si fins on opposite sides of the SiGe fins; and removing the SiGe fins.

Abstract translation: 提供了使用Si / SiGe选择性外延生长工艺形成FinFET器件的双重和/或多个鳍片的方法和所得到的器件。 实施例包括在氧化物层中形成Si柱，Si柱具有底部和顶部; 去除Si柱的顶部; 在Si柱的底部形成SiGe柱; 减少SiGe支柱; 在所述还原SiGe柱的相对侧上形成第一组Si散热片; 去除SiGe支柱; 用SiGe翅片代替Si翅片; 减少SiGe散热片; 在SiGe翅片的相对侧上形成第二组Si翅片; 并去除SiGe散热片。

公开(公告)号：US20140327139A1

公开(公告)日：2014-11-06

申请号：US13875377

申请日：2013-05-02

Applicant: GLOBALFOUNDRIES INC.

Inventor： Jialin YU ,  Jilin XIA ,  Huang LIU ,  Wonwoo KIM ,  Changyong XIAO

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522

CPC classification number: H01L23/5226 ,  H01L21/76846 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Contact structures and methods of fabricating contact structures of semiconductor devices are provided. One method includes, for instance: obtaining a substrate including a dielectric layer over the substrate; patterning the dielectric layer with at least one contact opening; providing a contact liner within the at least one contact opening in the dielectric layer; and filling the contact liner with a conductive material. In enhanced aspects, providing the contact liner within the at least one contact opening includes: depositing a first layer within the at least one contact opening in the dielectric layer; depositing a second layer over the first layer within the at least one contact opening; depositing at least one intermediate layer over the second layer within the at least one contact opening; and depositing a top layer over the at least one intermediate layer within the at least one contact opening.

Abstract translation: 提供了制造半导体器件的接触结构的接触结构和方法。 一种方法包括例如：在衬底上获得包括电介质层的衬底; 用至少一个接触开口构图介电层; 在所述电介质层中的所述至少一个接触开口内提供接触衬垫; 并用导电材料填充接触衬垫。 在增强的方面，在所述至少一个接触开口内提供所述接触衬垫包括：在所述电介质层中的所述至少一个接触开口内沉积第一层; 在所述至少一个接触开口内的第一层上沉积第二层; 在所述至少一个接触开口内沉积所述第二层上的至少一个中间层; 以及在所述至少一个接触开口内的所述至少一个中间层上沉积顶层。