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公开(公告)号:US20190229184A1
公开(公告)日:2019-07-25
申请号:US15876530
申请日:2018-01-22
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Steven M. Shank , Cameron Luce , Pernell Dongmo
IPC: H01L29/06 , H01L29/08 , H01L21/02 , H01L21/764 , H01L29/66 , H01L21/3065 , H01L29/78
Abstract: Structures that integrate airgaps with a field-effect transistor and methods for forming a field-effect transistor with integrated airgaps. A first semiconductor layer is formed on a substrate, and a second semiconductor layer is formed over the first semiconductor layer. A source/drain region of a field-effect transistor is formed in the second semiconductor layer. An airgap is located in the first semiconductor layer, The airgap is arranged in a vertical direction between the source/drain region and the substrate.
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2.
公开(公告)号:US10818772B2
公开(公告)日:2020-10-27
申请号:US15961364
申请日:2018-04-24
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Vibhor Jain , Pernell Dongmo , Cameron Luce , James W. Adkisson , Qizhi Liu
IPC: H01L29/66 , H01L29/737 , H01L29/10 , H01L29/08 , H01L29/06
Abstract: Fabrication methods and device structures for a heterojunction bipolar transistor. A trench isolation region is formed that surrounds an active region of semiconductor material, a collector is formed in the active region, and a base layer is deposited that includes a first section over the trench isolation region, a second section over the active region, and a third section over the active region that connects the first section and the second section. An emitter is arranged over the second section of the base layer, and an extrinsic base layer is arranged over the first section of the base layer and the third section of the base layer. The extrinsic base layer includes a first section containing polycrystalline semiconductor material and a second section containing single-crystal semiconductor material. The first and second sections of the extrinsic base layer intersect along an interface that extends over the trench isolation region.
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3.
公开(公告)号:US20190326411A1
公开(公告)日:2019-10-24
申请号:US15961364
申请日:2018-04-24
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Vibhor Jain , Pernell Dongmo , Cameron Luce , James W. Adkisson , Qizhi Liu
IPC: H01L29/66 , H01L29/737 , H01L29/06 , H01L29/08 , H01L29/10
Abstract: Fabrication methods and device structures for a heterojunction bipolar transistor. A trench isolation region is formed that surrounds an active region of semiconductor material, a collector is formed in the active region, and a base layer is deposited that includes a first section over the trench isolation region, a second section over the active region, and a third section over the active region that connects the first section and the second section. An emitter is arranged over the second section of the base layer, and an extrinsic base layer is arranged over the first section of the base layer and the third section of the base layer. The extrinsic base layer includes a first section containing polycrystalline semiconductor material and a second section containing single-crystal semiconductor material. The first and second sections of the extrinsic base layer intersect along an interface that extends over the trench isolation region.
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公开(公告)号:US10720494B2
公开(公告)日:2020-07-21
申请号:US15876530
申请日:2018-01-22
Applicant: GLOBALFOUNDRIES Inc.
Inventor: Steven M. Shank , Cameron Luce , Pernell Dongmo
IPC: H01L29/06 , H01L29/08 , H01L29/66 , H01L29/78 , H01L29/49 , H01L21/76 , H01L21/02 , H01L21/764 , H01L21/3065 , H01L21/762 , H01L21/308 , H01L21/768
Abstract: Structures that integrate airgaps with a field-effect transistor and methods for forming a field-effect transistor with integrated airgaps. A first semiconductor layer is formed on a substrate, and a second semiconductor layer is formed over the first semiconductor layer. A source/drain region of a field-effect transistor is formed in the second semiconductor layer. An airgap is located in the first semiconductor layer, The airgap is arranged in a vertical direction between the source/drain region and the substrate.
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