公开(公告)号：US20170207216A1

公开(公告)日：2017-07-20

申请号：US15001903

申请日：2016-01-20

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Wen Pin PENG ,  Min-hwa CHI

IPC: H01L27/088 ,  H01L21/306 ,  H01L29/06 ,  H01L21/8234

CPC classification number: H01L27/0886 ,  H01L21/30604 ,  H01L21/823412 ,  H01L21/823431 ,  H01L29/0657

Abstract: A multi-Vt FinFET includes a semiconductor substrate, multiple first fins coupled to the semiconductor substrate having a first fin pitch, and multiple second fins coupled to the semiconductor substrate having a second fin pitch larger than the first fin pitch. The semiconductor structure further includes transistor(s) on the multiple first fins, and transistor(s) on the multiple second fins, a threshold voltage of the transistor(s) on the multiple second fins being higher than that of the transistor(s) on the multiple first fins.

公开(公告)号：US20170207118A1

公开(公告)日：2017-07-20

申请号：US14995838

申请日：2016-01-14

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Wen Pin PENG ,  Min-hwa CHI ,  Yue HU

IPC: H01L21/768 ,  H01L29/08 ,  H01L23/535 ,  H01L29/06 ,  H01L29/66 ,  H01L21/28

CPC classification number: H01L21/76829 ,  H01L21/28123 ,  H01L21/76897 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/78

Abstract: A starting semiconductor structure for a RMG process includes a semiconductor substrate, transistors in process having dummy gates and electrically isolated by isolation regions. The dummy gates are replaced with metal gates and gate caps, the structure being planarized after replacing the gate. A cap layer is formed over the planarized structure, and trenches are formed through the cap to expose source and drain regions of the transistors, which allows for self-aligned source and drain contacts. Semiconductor structures including the source and drain trenches for self-aligned source/drain contacts are also presented.