公开(公告)号：US20220093751A1

公开(公告)日：2022-03-24

申请号：US17029446

申请日：2020-09-23

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Ketankumar H. Tailor ,  Peter Baars ,  Ruchil K. Jain

IPC: H01L29/40 ,  H01L29/06 ,  H01L29/78 ,  H01L29/49

Abstract: Embodiments of the disclosure provide an integrated circuit device and related methods. The disclosure may provide a transistor device, including: a gate structure; a drain extension region extending laterally from partially under the gate structure to a drain region; and a gate spacer located over the drain extension region. A silicide-blocking layer is over and in contact with the gate spacer. The silicide-blocking layer has a first end over the gate structure and a second, opposing end over the drain extension region. The structure also provides a conductive field plate, including a conductive layer over and in contact with the silicide-blocking layer. A field plate contact is formed on the conductive field plate.

公开(公告)号：US11456364B2

公开(公告)日：2022-09-27

申请号：US17029446

申请日：2020-09-23

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Ketankumar H. Tailor ,  Peter Baars ,  Ruchil K. Jain

IPC: H01L29/40 ,  H01L29/49 ,  H01L29/78 ,  H01L29/06

Abstract: Embodiments of the disclosure provide an integrated circuit device and related methods. The disclosure may provide a transistor device, including: a gate structure; a drain extension region extending laterally from partially under the gate structure to a drain region; and a gate spacer located over the drain extension region. A silicide-blocking layer is over and in contact with the gate spacer. The silicide-blocking layer has a first end over the gate structure and a second, opposing end over the drain extension region. The structure also provides a conductive field plate, including a conductive layer over and in contact with the silicide-blocking layer. A field plate contact is formed on the conductive field plate.

公开(公告)号：US11888062B2

公开(公告)日：2024-01-30

申请号：US17491850

申请日：2021-10-01

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Felix Holzmüller ,  Ruchil K. Jain ,  Peter Baars

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66 ,  H01L29/165 ,  H01L29/51

CPC classification number: H01L29/7816 ,  H01L29/0847 ,  H01L29/1054 ,  H01L29/66659 ,  H01L29/66681 ,  H01L29/7835

Abstract: Structures for an extended-drain metal-oxide-semiconductor device and methods of forming a structure for an extended-drain metal-oxide-semiconductor device. The structure includes a semiconductor substrate containing a first semiconductor material, a source region and a drain region in the semiconductor substrate, a gate electrode positioned in a lateral direction between the source region and the drain region, and a semiconductor layer positioned on the semiconductor substrate. The semiconductor layer contains a second semiconductor material that differs in composition from the first semiconductor material. The gate electrode includes a first section positioned in a vertical direction over the semiconductor layer and a second section positioned in the vertical direction over the semiconductor substrate.