Method and structure to provide integrated long channel vertical FinFet device

    公开(公告)号:US11081398B2

    公开(公告)日:2021-08-03

    申请号:US16007023

    申请日:2018-06-13

    Abstract: A vertical fin field effect transistor includes a semiconductor fin disposed over a well region and a gate conductor layer disposed over a sidewall of the fin, and extending laterally over a top surface of the well region adjacent to the fin. The extension of the gate conductor over the bottom source/drain effectively increases the channel length of the vertical FinFET device independent of the fin height. A bottom source/drain region is laterally adjacent to the well region such that the portion of the well region covered by the laterally extended gate stack is between the bottom source/drain region and the portion of the well region immediately under the fin. A top source/drain region is located above the fin. The device is operated in circuits by use of electrical contacts to the bottom source/drain, the gate conductor, and the top source/drain.

    IC product comprising a novel insulating gate separation structure for transistor devices

    公开(公告)号:US11349013B2

    公开(公告)日:2022-05-31

    申请号:US16549478

    申请日:2019-08-23

    Abstract: One illustrative integrated circuit product disclosed herein includes a first final gate structure having a first end surface and a second final gate structure having a second end surface. In this embodiment, the integrated circuit product also includes an insulating gate separation structure positioned between the first and second final gate structures, wherein the first end surface contacts a first side surface of the insulating gate separation structure and the second end surface contacts a second side surface of the insulating gate separation structure. In this embodiment, the insulating gate separation structure has an inverted T-shaped cross-sectional configuration in at least one direction.

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