Symmetric bi-directional silicon-controlled rectifier for electrostatic discharge protection

    公开(公告)号:US12051690B2

    公开(公告)日:2024-07-30

    申请号:US17523956

    申请日:2021-11-11

    CPC classification number: H01L27/0262

    Abstract: Disclosed is a semiconductor structure including a semiconductor substrate (e.g., a P-substrate) and a symmetric BDSCR. The BDSCR includes, within the substrate, a first well (e.g., a low-doped deep Nwell) and, within the first well, symmetric side sections and a middle section positioned laterally between the side sections. Each side section includes: second and third wells (e.g., Pwells), where the third well is shallower than and has a higher conductivity level than the second well. Each middle section includes multiple floating wells including: two fourth wells (e.g., Nwells), which have a higher conductivity level than the first well, and a fifth well (e.g., another Pwell), which is positioned laterally between and shallower than the fourth wells. By incorporating the floating wells into the middle section, high current tolerance is improved.

    SYMMETRIC BI-DIRECTIONAL SILICON-CONTROLLED RECTIFIER FOR ELECTROSTATIC DISCHARGE PROTECTION

    公开(公告)号:US20230141491A1

    公开(公告)日:2023-05-11

    申请号:US17523956

    申请日:2021-11-11

    CPC classification number: H01L27/0262

    Abstract: Disclosed is a semiconductor structure including a semiconductor substrate (e.g., a P-substrate) and a symmetric BDSCR. The BDSCR includes, within the substrate, a first well (e.g., a low-doped deep Nwell) and, within the first well, symmetric side sections and a middle section positioned laterally between the side sections. Each side section includes: second and third wells (e.g., Pwells), where the third well is shallower than and has a higher conductivity level than the second well. Each middle section includes multiple floating wells including: two fourth wells (e.g., Nwells), which have a higher conductivity level than the first well, and a fifth well (e.g., another Pwell), which is positioned laterally between and shallower than the fourth wells. By incorporating the floating wells into the middle section, high current tolerance is improved.

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